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參數(shù)資料
| 型號： | 12H1901-7RD2 |
| 廠商： | POWER-ONE INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT 50 W DC-DC REG PWR SUPPLY MODULE |
| 封裝： | METAL, CASE H02, MODULE |
| 文件頁數(shù)： | 8/19頁 |
| 文件大?。?/td> | 356K |
| 代理商： | 12H1901-7RD2 |
0
1
0.95
0
V
i [V DC]
0
t
low min
4
t
low min
4
t
high min
t
h
1
V
ti +Vhi
V
ti
Input voltage failure
Switch-on cycle
Input voltage sag
Switch-on cycle and subsequent
input voltage failure
V
D high
V
D low
V
D
0
JFET
NPN
t
V
o1
V
o1 nom
V
D high
V
D low
V
D
t
low min
4
t
h
1
0
V
D high
V
D low
V
D
0
JFET
NPN
V
o1
V
D high
V
D low
V
D
t
low min
4
V
to
3
Output voltage failure
0
I
D high
I
D low
I
D
t
0
I
D high
I
D low
I
D
t
3
2
33
V
o1 nom
V
to +Vho
Input voltage monitoring
Output voltage monitoring
11008
Threshold tolerances and hysteresis:
If
Vi is monitored, the internal input voltage after the input
filter is measured. Consequently this voltage differs from
the voltage at the connector pins by the voltage drop
ΔVt i
across the input filter. The value of
ΔVti depends upon the
input voltage range, threshold level
Vt, temperature, and
input current. The input current is a function of the input
voltage and the output power.
Fig. 18
Relationship between Vi, Vo1, VD, ID and Vo1/Vo nom versus time.
Fig. 17
Definition of Vti,
ΔVti and Vhi (JFET output)
1 n.a.
2 With output voltage monitoring the hold-up time th = 0
3 The D signal remains high if the D output is connected to
an external source.
4 tlow min = 40 to 200 ms, typically 80 ms
REV. MAR 27, 2006
Page 16 of 19
www.power-one.com
ΔV
ti
Vhi
VD low
VD
VD high
Vi
P
o
=
P
o
nom
P
o
=
0
P
o
=
0
Vti
P
o
=
P
o
nom
11021
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