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參數資料
| 型號： | AD7676 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 16-Bit +-1 LSB INL, 500 kSPS, Differential ADC |
| 中文描述： | 16位-1 LSB INL和500 kSPS的，差分ADC |
| 文件頁數： | 17/20頁 |
| 文件大小： | 321K |
| 代理商： | AD7676 |
REV. 0
AD7676
–
17
–
External Clock Data Read During Conversion
Figure 20 shows the detailed timing diagrams of this method.
During a conversion, while both
CS
and
RD
are low, the result
of the previous conversion can be read. The data is shifted out,
MSB first, with 16 clock pulses, and is valid on both rising and
falling edges of the clock. The 16 bits have to be read before the
current conversion is complete. If that is not done, RDERROR is
pulsed high and can be used to interrupt the host interface to
prevent incomplete data reading. There is no “daisy chain”
feature in this mode, and RDC/SDIN input should always be
tied either high or low.
To reduce performance degradation due to digital activity, a fast
discontinuous clock of 18 MHz at least is recommended to ensure
that all the bits are read during the first half of the conversion
phase. For this reason, this mode is more difficult to use.
MICROPROCESSOR INTERFACING
The AD7676 is ideally suited for traditional dc measurement
applications supporting a microprocessor, and ac signal process-
ing applications interfacing to a digital signal processor. The
AD7676 is designed to interface either with a parallel 8-bit or
16-bit wide interface or with a general purpose serial port or I/O
ports on a microcontroller. A variety of external buffers can be
used with the AD7676 to prevent digital noise from coupling
into the ADC. The following sections illustrate the use of the
AD7676 with an SPI equipped microcontroller, the ADSP-
21065L and ADSP-218x signal processors.
SPI Interface (MC68HC11)
Figure 22 shows an interface diagram between the AD7676 and
an SPI-equipped microcontroller like the MC68HC11. To
accommodate the slower speed of the microcontroller, the
AD7676 acts as a slave device and data must be read after con-
version. This mode also allows the “daisy chain” feature. The
convert command could be initiated in response to an internal
timer interrupt. The reading of output data, one byte at a time,
if necessary, could be initiated in response to the end-of-conver-
sion signal (BUSY going low) using an interrupt line of the
microcontroller. The Serial Peripheral Interface (SPI) on the
MC68HC11 is configured for master mode (MSTR) = 1, Clock
Polarity Bit (CPOL) = 0, Clock Phase Bit (CPHA) = 1 and SPI
interrupt enable (SPIE) = 1 by writing to the SPI Control Regis-
ter (SPCR). The IRQ is configured for edge-sensitive-only
operation (IRQE = 1 in OPTION register).
CNVST
SDOUT
SCLK
D1
D0
X
D15
D14
D13
1
2
3
14
15
16
BUSY
INVSCLK = 0
CS
EXT/
INT
= 1
RD
= 0
t
35
t
36
t
37
t
31
t
32
t
16
t
3
Figure 20. Slave Serial Data Timing for Reading (Read Previous Conversion during Convert)
BUSY
BUSY
AD7676
#2
(UPSTREAM)
AD7676
#1
(DOWNSTREAM)
RDC/SDIN
SDOUT
CNVST
CS
SCLK
RDC/SDIN
SDOUT
CNVST
CS
SCLK
DATA
OUT
SCLK IN
CS IN
CNVST IN
BUSY
OUT
Figure 21. Two AD7676s in a
“
Daisy Chain
”
Configuration
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