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參數資料
| 型號： | CS5102A-JP |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | ADC |
| 英文描述： | 16-Bit, 100kHz/ 20kHz A/D Converters |
| 中文描述： | 2-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDIP28 |
| 封裝： | 0.600 INCH, PLASTIC, MS-020, DIP-28 |
| 文件頁數： | 1/40頁 |
| 文件大小： | 466K |
| 代理商： | CS5102A-JP |
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1
Copyright
Cirrus Logic, Inc. 1997
(All Rights Reserved)
Cirrus Logic, Inc.
Crystal Semiconductor Products Division
P.O. Box 17847, Austin, Texas 78760
(512) 445 7222 FAX: (512) 445 7581
http://www.crystal.com
CS5101A
CS5102A
16-Bit, 100 kHz / 20 kHz A/D Converters
Features
l
Monolithic CMOS A/D Converters
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Inherent Sampling Architecture
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2-Channel Input Multiplexer
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Flexible Serial Output Port
l
Ultra-Low Distortion
-
S/(N+D): 92 dB
-
THD: 0.001%
l
Conversion Time
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CS5101A: 8 μs
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CS5102A: 40 μs
l
Linearity Error: ±0.001% FS
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Guaranteed No Missing Codes
l
Self-Calibration Maintains Accuracy
-
Over Time and Temperature
l
Low Power Consumption
-
CS5101A: 320 mW
-
CS5102A: 44 mW
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Power-down Mode: <1 mW
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Evaluation Board Available
Description
The CS5101A and CS5102A are 16-bit monolithic
CMOS analog-to-digital converters capable of 100 kHz
(5101A) and 20 kHz (5102A) throughput. The
CS5102A’s low power consumption of 44 mW, coupled
with a power down mode, makes it particularly suitable
for battery powered operation.
On-chip self-calibration circuitry achieves nonlinearity of
±0.001% of FS and guarantees 16-bit no missing codes
over the entire specified temperature range. Superior lin-
earity also leads to 92 dB S/(N+D) with harmonics below
-100 dB. Offset and full-scale errors are minimized dur-
ing the calibration cycle, eliminating the need for external
trimming.
The CS5101A and CS5102A each consist of a 2-chan-
nel input multiplexer, DAC, conversion and calibration
microcontroller, clock generator, comparator, and serial
communications port. The inherent sampling architec-
ture of the device eliminates the need for an external
track and hold amplifier.
The converters' 16-bit data is output in serial form with ei-
ther binary or 2's complement coding. Three output
timing modes are available for easy interfacing to micro-
controllers and shift registers. Unipolar and bipolar input
ranges are digitally selectable.
ORDERING INFORMATION
See page 3
6
.
I
CLKIN
XOUT
REFBUF
VREF
AIN1
AGND
HOLD SLEEPRST
CODEBP/UP
TRK1 TRK2 SSH/SDLSDATA
SCLK
TEST
DGND
VD-
VD+
VA-
VA+
12
28
2
5
16
17
8
9
11
15
3
4
21
20
19
22
25
23
7
1
6
26
14
-
+
-
+
-
+
-
+
Clock
Generator
Control
Calibration
SRAM
Microcontroller
Comparator
16-Bit Charge
Redistribution
DAC
STBY
CRS/FIN
10
AIN2
24
CH1/2
13
SCKMOD
27
OUTMOD
18
MAR ‘95
DS45F2
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| CS5102A | 16-Bit,100KHz A/D Converter(16位100KHz的A/D轉換器) |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| CS5102A-KL | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16-Bit, 100kHz/ 20kHz A/D Converters |
| CS5102A-KP | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16-Bit, 100kHz/ 20kHz A/D Converters |
| CS5102-AL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| CS5102A-SD | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
| CS5102A-SE | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Ended Data Acquisition System |
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