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參數資料
| 型號： | IDT74FCT16652AT |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS |
| 中文描述： | 快速CMOS 16位總線收發器/冊 |
| 文件頁數： | 1/9頁 |
| 文件大小： | 180K |
| 代理商： | IDT74FCT16652AT |
Integrated Device Technology, Inc.
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGE
AUGUST 1996
1996 Integrated Device Technology, Inc.
DSC-2549/8
1
IDT54/74FCT16652T/AT/CT/ET
IDT54/74FCT162652T/AT/CT/ET
FAST CMOS 16-BIT BUS
TRANSCEIVER/
REGISTERS
FEATURES:
Common features:
–
0.5 MICRON CMOS Technology
–
High-speed, low-power CMOS replacement for
ABT functions
–
Typical t
SK
(o) (Output Skew) < 250ps
–
Low input and output leakage
≤
1
μ
A (max.)
–
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
–
Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP,15.7 mil pitch TVSOP and 25 mil pitch Cerpack
–
Extended commercial range of -40
°
C to +85
°
C
–
V
CC
= 5V
±
10%
Features for FCT16652T/AT/CT/ET:
–
High drive outputs (-32mA I
OH
, 64mA I
OL
)
–
Power off disable outputs permit “live insertion”
–
Typical V
OLP
(Output Ground Bounce) < 1.0V at
V
CC
= 5V, T
A
= 25
°
C
Features for FCT162652T/AT/CT/ET:
–
Balanced Output Drivers:
±
24mA (commercial),
±
16mA (military)
–
–
Reduced system switching noise
Typical V
OLP
(Output Ground Bounce) < 0.6V at
V
CC
= 5V,T
A
= 25
°
C
DESCRIPTION:
The FCT16652T/AT/CT/ET and FCT162652T/AT/CT/ET
16-bit registered transceivers are built using advanced dual
metal CMOS technology. These high-speed, low-power de-
vices are organized as two independent 8-bit bus transceivers
with 3-state D-type registers. For example, the xOEAB and
x
OEBA
signals control the transceiver functions.
The xSAB and xSBA control pins are provided to select
either real time or stored data transfer. The circuitry used for
select control will eliminate the typical decoding glitch that
occurs in a multiplexer during the transition between stored
and real time data. A LOW input level selects real-time data
and a HIGH level selects stored data.
Data on the A or B data bus, or both, can be stored in the
internal D-flip-flops by LOW-to-HIGH transitions at the appro-
priate clock pins (xCLKAB or xCLKBA), regardless of the
select or enable control pins. Flow-through organization of
signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The FCT16652T/AT/CT/ET are ideally suited for driving
high capacitance loads and low-impedance backplanes. The
output buffers are designed with power off disable capability
to allow "live insertion" of boards when used as backplane
drivers.
The FCT162652T/AT/CT/ET have balanced output drive
with current limiting resistors. This offers low ground bounce,
minimal undershoot, and controlled output fall times–reducing
the need for external series terminating resistors. The
FCT162652T/AT/CT/ET are plug-in replacements for the
FCT16652T/AT/CT/ET and ABT16652 for on-board bus inter-
face applications.
FUNCTIONAL BLOCK DIAGRAM
1
A
1
1
OEBA
1
CLKBA
1
SBA
1
CLKAB
1
SAB
1
OEAB
2549 drw 01
1
B
1
B REG
A REG
D
D
C
C
TO 7 OTHER CHANNELS
2
B
1
2
CLKAB
2
OEBA
2
CLKBA
2
SBA
2
A
1
2
OEAB
2
SAB
2549 drw 02
TO 7 OTHER CHANNELS
B REG
A REG
D
D
C
C
相關PDF資料 |
PDF描述 |
|---|---|
| IDT74FCT16652ATE | FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS |
| IDT74FCT16652ATEB | FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS |
| IDT74FCT16652ATPA | FAST CMOS 16-BIT BUS TRANSCEIVER/ REGISTERS |
| IDT54FCT162652AT | CAP 100UF 4V 20% TANT SMD-7343-31 TR-7-PL SN100% LOWESR-200 ROHS-GUARANTEED |
| IDT54FCT162652ATE | CAP 100UF 6V 20% TANT SMD-7343-31 TR-7-PL GOLD LOWESR-150 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| IDT74FCT16652TPA | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16652TPV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16823ATPV | 制造商:INT_DEV_TECH 功能描述: |
| IDT74FCT16823CTPV | 制造商:Integrated Device Technology Inc 功能描述: |
| IDT74FCT16823ETPA | 制造商:Integrated Device Technology Inc 功能描述: |
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