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參數資料
| 型號： | IPM6220ACAZ-T |
| 廠商： | Intersil |
| 文件頁數： | 6/15頁 |
| 文件大小： | 527K |
| 描述： | IC REG 5OUT BUCK/LDO SYNC 24SSOP |
| 標準包裝： | 2,500 |
| 拓撲： | 降壓（降壓）同步（3），線性（LDO）（2） |
| 功能： | 任何功能 |
| 輸出數： | 5 |
| 頻率 - 開關： | 300kHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅動器： | 無 |
| 帶監控器： | 無 |
| 帶序列發生器： | 是 |
| 電源電壓： | 5.6 V ~ 24 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | * |
| 封裝/外殼： | * |
| 供應商設備封裝： | * |
| 包裝： | * |
6
Functional Pin Descriptions
VBATT (Pin 1)
Supplies all the power necessary to operate the chip. The IC
starts to operate when the voltage on this pin exceeds 4.7V
and stops operating when the voltage on this pin drops
below approximately 4.5V. Also provides battery voltage to
the oscillator for feed-forward rejection to input voltage
variations.
3.3V ALWAYS (Pin 2)
Output of 3.3V ALWAYS linear regulator.
5V ALWAYS (Pin 6)
Output of 5V ALWAYS linear regulator or the +5V Main
output. If the +5V Main output is enabled, it is switched
internally from the VSEN1 pin to the 5V ALWAYS output.
This improves efficiency and reduces the power dissipation
in the controller.
BOOT1, BOOT2 (Pins 24 and 3)
Power is supplied to the upper MOSFET drivers of PWM1
and PWM2 converters via the BOOT pins. Connect these
pins to the respective junctions of bootstrap capacitors with
the cathodes of the bootstrap diodes. Anodes of the
bootstrap diodes are connected to pin 6, 5V ALWAYS.
UGATE1, UGATE2 (Pins 23 and 4)
These pins provide the gate drive for the upper MOSFETs.
Connect UGATE pins to the respective PWM converters
upper MOSFET gate.
PHASE1, PHASE2 (Pins 22 and 5)
The phase nodes are the junctions of the upper MOSFET
sources, output filter inductors, and lower MOSFET drains.
Connect the PHASE pins directly to the respective PWM
converters lower MOSFET drain.
ISEN1, ISEN2 (Pins 21 and 9)
These pins are used to monitor the voltage drop across the
lower MOSFETs for current feedback and current-limit
protection. For more precise current detection, these inputs
can be connected to optional current sense resistors placed
in series with the sources of the lower MOSFETs.
LGATE1, LGATE 2 (Pins 20 and 7)
These pins provide the gate drive for the lower MOSFETs.
Connect the lower MOSFET gate of each converter to the
corresponding pin.
PGND1, PGND2 (Pins 19 and 8)
These are the lower MOSFET gate drive return connection
for PWM1 and PWM2 converters, respectively. Tie each
lower MOSFET source directly to the corresponding pin.
VSEN1, VSEN2 (Pins 18, 10)
These pins are connected to the main outputs and provide
the voltage feedback signal for the respective PWM
controllers. The PGOOD, overvoltage protection (OVP) and
undervoltage shutdown circuits use these signals to
determine output-voltage status and/or to initiate
undervoltage shut down. The VSEN1 input is also switched
internally to the 5V ALWAYS output if the +5V Main output is
enabled.
SDWNALL
(Pin 13)
This pin provides enable/disable function for all outputs. The
chip is completely disabled when this pin is pulled to ground.
When this pin is pulled high, the 5V ALWAYS and 3.3
ALWAYS outputs are on and the other outputs are enabled.
The state of 5V Main and 3.3V Main outputs depend on the
voltage on SDWN1
and SDWN2
respectively. See Table 1.
SDWN1
(Pin 17)
This pin provides enable/disable function and soft-start for
the PWM1, 5V Main, output. The output is enabled when this
pin is high and SDWNALL
is also high. The 5V output is held
off when the pin is pulled to the ground.
SDWN2
(Pin 11)
This pin provides enable/disable function and soft-start for
PWM2, 3.3V Main, output. The output is enabled when this
pin is high and SDWNALL
is also high. The 3.3V output is
held off when the pin is pulled to the ground.
VSEN3 (Pin 15)
This input pin is the voltage feedback signal for PWM3, the
boost controller. The boost controller regulates this point to a
voltage divided level of 2.472 VDC. The PGOOD,
overvoltage protection (OVP) and undervoltage shutdown
circuits use this signal to determine output-voltage status
and/or to initiate undervoltage shut down.
This pin can also be used to independently disable the
PWM3 controller. Connect this pin to 5V ALWAYS if the
boost converter is not populated in your design.
GATE3 (Pin 16)
This pin drives the gate of the boost MOSFET.
PGOOD (Pin 12)
PGOOD is an open drain output used to indicate the status
of the PWM converters output voltages. This pin is pulled
low when any of the outputs except PWM3 (12V) is not
within -10% of respective nominal voltages, or when PWM3
(12V) is not within its undervoltage and overvoltage
thresholds.
GND (Pin 14)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
General Description
The IPM6220A addresses the system electronics power
needs of modern notebook and sub-notebook PCs. The IC
integrates control circuits for two synchronous buck
IPM6220A
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