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參數資料
| 型號： | ISL6174IRZ |
| 廠商： | Intersil |
| 文件頁數： | 3/16頁 |
| 文件大小： | 346K |
| 描述： | IC CIRC BREAKER DUAL LV 28-QFN |
| 標準包裝： | 60 |
| 類型： | 熱交換控制器 |
| 應用： | 通用 |
| 內部開關： | 無 |
| 電源電壓： | 2.25 V ~ 3.63 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-VFQFN 裸露焊盤 |
| 供應商設備封裝： | 28-QFN 裸露焊盤（5x5） |
| 包裝： | 管件 |
3
FN6830.0
December 19, 2008
Pinout
28 LEAD QFN
TOP VIEW
1
2
3
4
5
6
7
21
20
19
18
17
16
15
28 27 26 25 24 23 22
8
9 10 11 12 13 14
SNS2
VO2
SS2
GT2
FLT2
PG2
TCB2
SNS1
VO1
SS1
GT1
FLT1
PG1
TCB1
Pin Descriptions
PIN
NAME
FUNCTION
DESCRIPTION
1
SNS1
Current Sense Input
This pin is connected to the current sense resistor and control MOSFET Drain node. It provides
current sense signal to the internal comparator in conjunction with VS1 pin.
2
VO1
Output Voltage 1
This pin is connected to the control MOSFET switch source, which connects to a load. Internally, this
voltage is used for SS control.
3
SS1
Soft-Start Duration Set
Input
A capacitor from this pin to ground sets the output soft-start ramp slope. This capacitor is charged by
the internal 10礎 current source setting the soft-start ramp. The output voltage ramp tracks the SS
ramp by controlled enhancement of FET gate. Once ramp-up is completed, the capacitor continues
to charge to the CPVDD voltage rail. If common capacitor is used (by tying SS1, SS2 together and
the capacitor to GND from the connection) then both the outputs track each other as they ramp up.
4
GT1
Gate Drive Output
Direct connection to the gate of the external N-Channel MOSFET. At turn-on the Gate will charge to
4 X Vbias or 10V(max) from the 24礎 source.
5
FLT1
Fault Output
This is an open drain output. It asserts (pulls low) once the circuit breaker delay (determined by the
TCB timeout cap) has expired. This output is valid for Vbias>1V.
6
PG1
Power Good Output
This is an active low, open drain output. When asserted (logic zero), it indicates that the voltage on
UV1 pin is more than 643mV (633mV + 10mV hysteresis). This output is valid at VBIAS >1V.
7
TCB1
Circuit Breaker Delay
Timer
A capacitor from this pin to ground sets the delay from the onset of an over current event to channel
shutdown (circuit breaker delay). Once the voltage on TCB cap reaches V
CT_Vth
the GATE output is
pulled down and the FLT
is asserted.
The time for circuit breaker delay (t
CB
) = (C
TCB
*1.178)/10礎.
8
DNC
Do not connect
Do not connect
9
GND
Chip Gnd
This pin is also internally shorted to the metal tab at the bottom of the IC.
10
PGND
Charge pump ground. Both GND and PGND must be tied together externally.
11
CPQ-
Charge Pump Capacitor
Low Side
Flying cap lowside.
ISL6174
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| ISL6174IRZ-T | 功能描述:IC CIRC BREAKER DUAL LV 28-QFN RoHS:是 類別:集成電路 (IC) >> PMIC - 熱交換 系列:- 產品培訓模塊:Obsolescence Mitigation Program 標準包裝:100 系列:- 類型:熱插拔開關 應用:通用 內部開關:是 電流限制:可調 電源電壓:9 V ~ 13.2 V 工作溫度:-40°C ~ 150°C 安裝類型:表面貼裝 封裝/外殼:10-WFDFN 裸露焊盤 供應商設備封裝:10-TDFN-EP（3x3） 包裝:管件 |
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