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參數資料
| 型號： | ISL6432CB-T |
| 廠商： | Intersil |
| 文件頁數： | 9/12頁 |
| 文件大小： | 274K |
| 描述： | IC REG QD BCK/LINEAR 16-SOIC |
| 標準包裝： | 2,500 |
| 拓撲： | 降壓（降壓）同步（1），線性（LDO）（3） |
| 功能： | 任何功能 |
| 輸出數： | 4 |
| 頻率 - 開關： | 300kHz |
| 電壓/電流 - 輸出 1： | 控制器 |
| 電壓/電流 - 輸出 2： | 控制器 |
| 電壓/電流 - 輸出 3： | 控制器 |
| 帶 LED 驅動器： | 無 |
| 帶監控器： | 無 |
| 帶序列發生器： | 是 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | * |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | * |
| 包裝： | 帶卷 (TR) |
9
C
OCSET
capacitor with a value of an order of magnitude
larger than the output capacitance of the pull-down device,
has to be used in parallel with R
OCSET
(1nF recommended).
Upon turn-off of the pull-down device, the switching regulator
undergoes a soft-start cycle.
Important
If the collector voltage to a linear regulator pass transistor
(Q3, Q4, or Q5) is lost, the respective regulator has to be
shut down by pulling high its FB pin (i.e., when an input
power rail shuts down as a result of entering a sleep state,
the affected regulators FB pin has to be pulled high). This
measure is necessary in order to avoid possible damage to
the ISL6432 as a result of overheating. Overheating can
occur in such situations due to sheer power dissipation
inside the chips output linear drivers.
Component Selection Guidelines
Output Capacitor Selection
The output capacitors for each output have unique
requirements. In general, the output capacitors should be
selected to meet the dynamic regulation requirements.
Additionally, the PWM converters require an output capacitor
to filter the current ripple. The load transient for the
microprocessor core requires high quality capacitors to
supply the high slew rate (di/dt) current demands.
PWM Output Capacitors
Modern microprocessors produce transient load rates above
1A/ns. High frequency capacitors initially supply the transient
current and slow the load rate-of-change seen by the bulk
capacitors. The bulk filter capacitor values are generally
determined by the ESR (effective series resistance) and
voltage rating requirements rather than actual capacitance
requirements.
High frequency decoupling capacitors should be placed as
close to the power pins of the load as physically possible. Be
careful not to add inductance in the circuit board wiring that
could cancel the usefulness of these low inductance
components. Consult with the manufacturer of the load on
specific decoupling requirements.
Use only specialized low-ESR capacitors intended for
switching-regulator applications for the bulk capacitors. The
bulk capacitors ESR determines the output ripple voltage and
the initial voltage drop following a high slew-rate transients
edge. An aluminum electrolytic capacitors ESR value is
related to the case size with lower ESR available in larger
case sizes. However, the equivalent series inductance (ESL)
of these capacitors increases with case size and can reduce
the usefulness of the capacitor to high slew-rate transient
loading. Unfortunately, ESL is not a specified parameter. Work
with your capacitor supplier and measure the capacitors
impedance with frequency to select a suitable component. In
most cases, multiple electrolytic capacitors of small case size
perform better than a single large case capacitor.
Linear Output Capacitors
The output capacitors for the linear regulators provide
dynamic load current. The linear controllers use dominant
pole compensation integrated into the error amplifier and are
insensitive to output capacitor selection. Output capacitors
should be selected for transient load regulation.
PWM Output Inductor Selection
The PWM converter requires an output inductor. The output
inductor is selected to meet the output voltage ripple
requirements and sets the converters response time to a
load transient. The inductor value determines the converters
ripple current and the ripple voltage is a function of the ripple
current. The ripple voltage and current are approximated by
the following equations:
Increasing the value of inductance reduces the ripple current
and voltage. However, the large inductance values increase
the converters response time to a load transient.
One of the parameters limiting the converters response to a
load transient is the time required to change the inductor
current. Given a sufficiently fast control loop design, the
ISL6432 will provide either 0% or 100% duty cycle in
response to a load transient. The response time is the time
interval required to slew the inductor current from an initial
current value to the post-transient current level. During this
interval the difference between the inductor current and the
transient current level must be supplied by the output
capacitor(s). Minimizing the response time can minimize the
output capacitance required.
The response time to a transient is different for the
application of load and the removal of load. The following
equations give the approximate response time interval for
application and removal of a transient load:
FIGURE 6. ASYMPTOTIC BODE PLOT OF CONVERTER GAIN
100
80
60
40
20
0
-20
-40
-60
F
P1
F
Z2
10M
1M
100K
10K
1K
100
10
OPEN LOOP
ERROR AMP GAIN
F
Z1
F
P2
F
LC
F
ESR
COMPENSATION
FREQUENCY (Hz)
GAIN
MODULATOR
GAIN
CLOSED LOOP
GAIN
20
V
IN
V
PP
----------- -
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
log
20
R2
R
S1
------------ -
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
log
I
V
IN
V
OUT
F
S
L
?/DIV>
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------------------------------- -
V
OUT
V
IN
--------------- -
?/DIV>
=
V
OUT
I
ESR
?/DIV>
=
t
RISE
L
O
I
TRAN
?/DIV>
V
IN
V
OUT
------------------------------- -
=
t
FALL
L
O
I
TRAN
?/DIV>
V
OUT
------------------------------ -
=
ISL6432
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