- 您現在的位置：買賣IC網 > PDF目錄371044 > MC68360RC33 (MOTOROLA INC) QUad Integrated Communications Controller Users Manual PDF資料下載
參數資料
| 型號： | MC68360RC33 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | QUad Integrated Communications Controller Users Manual |
| 中文描述： | 32-BIT, 33 MHz, RISC MICROCONTROLLER, CPGA241 |
| 封裝： | PGA-241 |
| 文件頁數： | 9/28頁 |
| 文件大?。?/td> | 159K |
| 代理商： | MC68360RC33 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁
MOTOROLA
MC68360 USER’S MANUAL ERRATA
9
NOTE
The default setting of bits 3 and 2 for option register 1 is deter-
mined by the settings of configuration pin.
19. Error in Table 6-14.
On page 6-77, The last column heading on Table 6-14 has an error. The heading should be:
“Number of clocks (DRAM)” not “Number of Wait States (DRAM)”
Section 7 – Communication Processor Module
1. Global advisory concerning Buffer Descriptor status bits.
The user is responsible for clearing (writing a zero) any buffer descriptor (RxBD or TxBD)
status bits set by the communication processor.
2. Deletion of STP bit.
On page 7-26, section 7.6.2.1. The STP bit in the ICCR was designed to conserve power
when IDMA was not in use. This function has been removed due to erratic behavior. The
user must keep this bit clear. Bit 15 of ICCR is now reserved.
3. Error in note.
On page 7-33, the note under section 7.6.3 Interface Signals should be as follows.
NOTE
DREQ must be level sensitive if IDMA uses buffer chaining or
auto buffer mode.
4. Wrong section number.
On page 7-34, the last sentence on the page "7.5.2.5 Timer Capture Register..." The section
was not correct. The correct section number is 7.6.2.5.
5. Wrong table reference.
On page 7-35, first sentence in section 7.6.4.2.1 reference, table 7-2. This should be table
7-3.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關PDF資料 |
PDF描述 |
|---|---|
| MC68360ZP25 | QUad Integrated Communications Controller Users Manual |
| MC68040 | Errata and Added Information to MC68360 Quad Integrated Communication Controller User Manual Rev 1 |
| MC68360 | 32-Bit Microprocessor(32位微處理器) |
| MC6840 | Programmable Timer Module(PTM) |
| MC68440 | Dual-Channel Direct Memory Access Controller |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC68360RC33L | 功能描述:微處理器 - MPU QUICC SIM 4SCC RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324 |
| MC68360TUT | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:TUTORIAL A QUICC-START |
| MC68360UM | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MC68360 QUad Integrated Communication Controller (QUICCa?￠) |
| MC68360UM/AD | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:MC68360 QUad Integrated Communication Controller |
| MC68360UMAD | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:Errata and Added Information to MC68360 Quad Integrated Communication Controller User Manual Rev 1 |
發布緊急采購，3分鐘左右您將得到回復。