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參數資料
| 型號： | MC68360ZP25 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | QUad Integrated Communications Controller Users Manual |
| 中文描述： | 32-BIT, 25 MHz, RISC MICROCONTROLLER, PBGA357 |
| 封裝： | BGA-357 |
| 文件頁數： | 17/28頁 |
| 文件大?。?/td> | 159K |
| 代理商： | MC68360ZP25 |
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MOTOROLA
MC68360 USER’S MANUAL ERRATA
17
In MC68040 companion mode, the QUICC understands
MC68040-type bus cycles but cannot generate them. If the
QUICC becomes busmaster, e. g. for SDMA transfers, it will
drive normal MC68030-type bus cycles with TT1 becoming DS
again. This should normally be no problem since the MC68040
does not interpret these input signals, but external circuitry han-
dling these signals must be aware of this fact.
6. Error in Figure 9-8.
On page 9-33, Figure 9-8, the buffer between RESETH, RSTI, the pushbutton and
CONFIG2 should not have an inverting output; it should be a non-inverting buffer.
7. Error in Reset Strategy.
On Page 9-34, section 9.4.1.3, the first sentence “If a QUICC is configured to provide the
global chip select, it will also provide an internal power-on reset generation.” is not correct.
QUICC will provide internal power-on reset generation regardless of chip select
configuration.
8. Error in Caching Sample Code.
On Page 9-53, section 9.5.4, correct the following in the code sample:
a) ‘MOVE.L #$003FC020,D0’ should be changed to ‘MOVE.L #$003FC040,D0’.
b) ‘MOVE.L #$403FC010,D0’ should be changed to ‘MOVE.L #$403FC020,D0’.
9. Error in Figure 9-33. 1-Mbyte DRAM Bank—32 Bits Wide.
On Page 9-87, Figure 9-33, correct the following:
a) On the first MC74F157, B0-B3 should be connected to A11-A14, not A12-A15.
b) On the second MC74F157, B0-B3 should be connected to A15-A18, not A16-A19.
c) On the third MC74F157, A1 and B1 should be unused (unconnected).
d) On the third MC74F157, B0 should be connected to A19, not A20.
e) On the third MC74F157, Y1-Y3 should be unused (unconnected).
Section 10 – Electrical Characteristics
1. Missing Note on Maximum Ratings
On Page 10-1, the following note should be added to the maximum ratings figure:
3. The supply voltage V
cc
must start and restart from 0.0 V; otherwise, the 360 will not come
out of reset properly.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
相關PDF資料 |
PDF描述 |
|---|---|
| MC68040 | Errata and Added Information to MC68360 Quad Integrated Communication Controller User Manual Rev 1 |
| MC68360 | 32-Bit Microprocessor(32位微處理器) |
| MC6840 | Programmable Timer Module(PTM) |
| MC68440 | Dual-Channel Direct Memory Access Controller |
| MC6845 | MOS(N-Channel, Silicon-Gate) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| MC68360ZP25L | 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA（25x25） 包裝:托盤 |
| MC68360ZP25LR2 | 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，FCBGA 供應商設備封裝:783-FCPBGA（29x29） 包裝:托盤 |
| MC68360ZP25VL | 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA（25x25） 包裝:托盤 |
| MC68360ZP25VLR2 | 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA，FCBGA 供應商設備封裝:783-FCPBGA（29x29） 包裝:托盤 |
| MC68360ZP33K | 制造商:Motorola Inc 功能描述: |
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