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參數資料
型號: MC68360ZP25
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: QUad Integrated Communications Controller Users Manual
中文描述: 32-BIT, 25 MHz, RISC MICROCONTROLLER, PBGA357
封裝: BGA-357
文件頁數: 26/28頁
文件大小: 159K
代理商: MC68360ZP25
26
MC68360 USER’S MANUAL ERRATA
MOTOROLA
2. IMPORTANT DEBUGGING TIP
PLL loss-of-lock resets are no longer supported, and MUST be disabled.
Background:
The original release of the 68360 supported a feature whereby if loss of PLL lock was
detected, a hardware reset could be generated. This feature was enabled by setting a bit in
the CLKOCR (bit5; RSTEN). However, the circuits which detect loss-of-lock are hyper
sensitive, and sometimes cause hardware resets when PLL lock is not lost. As this feature
was problematic and provided little extra functionality, it was decided to no longer support
this feature. This change is included in Revision 1 of the 68360 User's Manual.
Problem symptoms:
Sporadic resets. After reset, bit 2 will be set in the RSR.
Recommended action:
For the purpose of robustness, we request that bit 5 in the CLKOCR (formerly known as
RSTEN) be set to zero, regardless of whether a problem is currently exhibited. This will help
safeguard against problems in the future. Clearing bit 5 in the CLKOCR will disable loss-of-
lock resets.
3. Phase Lock Loop.
The following section describes the performance guidelines for the on-chip phase locked
loop on the QUICC. The following explanations should be considered as general
observations on expected PLL behavior and should not be considered as specifications.
The parts are not tested to verify these exact numbers. These observations were measured
on a LIMITED number of parts and were not verified over the entire temperature and voltage
ranges.
4. Phase Skew Performance.
The phase skew of the PLL is defined as the time difference between the rising edges of
EXTAL and CLKO1/2 for a given capacitive load on CLKO1/2, over the entire process,
temperature and voltage ranges. This is defined in specifications 5B, 5C, and 5D (on page
10-7, Table 10.7). For input frequencies greater than 10MHZ and MF<=4, the skew is
between 0.0ns and less than 2.0ns (for rise time of 4ns), otherwise, this skew is not
guaranteed. However, for MF<10 and input frequencies greater than 10MHz, this skew is
between -3.0ns and +4.0ns.
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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相關PDF資料
PDF描述
MC68040 Errata and Added Information to MC68360 Quad Integrated Communication Controller User Manual Rev 1
MC68360 32-Bit Microprocessor(32位微處理器)
MC6840 Programmable Timer Module(PTM)
MC68440 Dual-Channel Direct Memory Access Controller
MC6845 MOS(N-Channel, Silicon-Gate)
相關代理商/技術參數
參數描述
MC68360ZP25L 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA(25x25) 包裝:托盤
MC68360ZP25LR2 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA,FCBGA 供應商設備封裝:783-FCPBGA(29x29) 包裝:托盤
MC68360ZP25VL 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:2 系列:MPC8xx 處理器類型:32-位 MPC8xx PowerQUICC 特點:- 速度:133MHz 電壓:3.3V 安裝類型:表面貼裝 封裝/外殼:357-BBGA 供應商設備封裝:357-PBGA(25x25) 包裝:托盤
MC68360ZP25VLR2 功能描述:IC MPU QUICC 25MHZ 357-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微處理器 系列:M683xx 標準包裝:1 系列:MPC85xx 處理器類型:32-位 MPC85xx PowerQUICC III 特點:- 速度:1.2GHz 電壓:1.1V 安裝類型:表面貼裝 封裝/外殼:783-BBGA,FCBGA 供應商設備封裝:783-FCPBGA(29x29) 包裝:托盤
MC68360ZP33K 制造商:Motorola Inc 功能描述:
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