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參數資料
型號： NCT7491RQR2G
廠商： ON Semiconductor
文件頁數： 73/80頁
文件大小： 844K
描述： IC REMOTE THERMAL MONITOR 24QSOP
標準包裝： 2,500
系列： *
NCT7491
http://onsemi.com
73
Table 129. REGISTER 0Xbb  SMBus Master Status 6 (PowerOn Default = 0x00)
Bit
Description
R/W
Name
<3>
TH3
Read
Logic 1 indicates that the SMBus Device 3 reading is above the programmed THERM Limit
<4>
TH4
Read
Logic 1 indicates that the SMBus Device 4 reading is above the programmed THERM Limit
<5>
TH5
Read
Logic 1 indicates that the SMBus Device 5 reading is above the programmed THERM Limit
<6>
TH6
Read
Logic 1 indicates that the SMBus Device 6 reading is above the programmed THERM Limit
<7>
TH7
Read
Logic 1 indicates that the SMBus Device 7 reading is above the programmed THERM Limit
Table 130. REGISTER 0xBC  SMBus Master Mask 1 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<0>
NACK0
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 0
<1>
NACK1
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 1
<2>
NACK2
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 2
<3>
NACK3
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 3
<4>
NACK4
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 4
<5>
NACK5
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 5
<6>
NACK6
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 6
<7>
NACK7
R/W
Logic 1 masks a No Acknowledge assertion for SMBus Device 7
Table 131. REGISTER 0xBD  SMBus Master Mask 2 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<0>
PEC0
R/W
Logic 1 masks a PEC error assertion for SMBus Device 0
<1>
PEC1
R/W
Logic 1 masks a PEC error assertion for SMBus Device 1
<2>
PEC2
R/W
Logic 1 masks a PEC error assertion for SMBus Device 2
<3>
PEC3
R/W
Logic 1 masks a PEC error assertion for SMBus Device 3
<4>
PEC4
R/W
Logic 1 masks a PEC error assertion for SMBus Device 4
<5>
PEC5
R/W
Logic 1 masks a PEC error assertion for SMBus Device 5
<6>
PEC6
R/W
Logic 1 masks a PEC error assertion for SMBus Device 6
<7>
PEC7
R/W
Logic 1 masks a PEC error assertion for SMBus Device 7
Table 132. REGISTER 0Xbe  SMBus Master Mask 3 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<0>
TO0
R/W
Logic 1 masks a timeout error assertion for SMBus Device 0
<1>
TO1
R/W
Logic 1 masks a timeout error assertion for SMBus Device 1
<2>
TO2
R/W
Logic 1 masks a timeout error assertion for SMBus Device 2
<3>
TO3
R/W
Logic 1 masks a timeout error assertion for SMBus Device 3
<4>
TO4
R/W
Logic 1 masks a timeout error assertion for SMBus Device 4
<5>
TO5
R/W
Logic 1 masks a timeout error assertion for SMBus Device 5
<6>
TO6
R/W
Logic 1 masks a timeout error assertion for SMBus Device 6
<7>
TO7
R/W
Logic 1 masks a timeout error assertion for SMBus Device 7
Table 133. REGISTER 0Xbf  SMBus Master Mask 4 (PowerOn Default = 0x00)
Bit
Name
R/W
Description
<0>
HILO0
R/W
Logic 1 masks limit assertions for SMBus Device 0
<1>
HILO1
R/W
Logic 1 masks limit assertions for SMBus Device 1
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