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參數(shù)資料
型號(hào): S25FL004D0LNAI011
廠商: Spansion Inc.
英文描述: 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
中文描述: 4兆位的CMOS閃存3.0伏,50赫茲的SPI總線接口
文件頁數(shù): 17/36頁
文件大?。?/td> 724K
代理商: S25FL004D0LNAI011
24
S25FL Family (Serial Peripheral Interface) S25FL004D
S25FL004D_00A0 June 28, 2004
Ad va n c e
In f o rm a t i o n
Figure 15. Release from Deep Power Down Instruction Sequence
Release from Deep Power Down and Read Electronic Signature (RES)
Once the device has entered Deep Power Down mode, all instructions are ignored
except the RES instruction. The RES instruction can also be used to read the 8-
bit Electronic Signature of the device on the SO pin. The RES instruction always
provides access to the Electronic Signature of the device (except while an Erase,
Program or WRSR cycle is in progress), and can be applied even if DP mode has
not been entered. Any RES instruction executed while an Erase, Program or
WRSR cycle is in progress is not decoded, and has no effect on the cycle in
progress.
The device features an 8-bit Electronic Signature, whose value for the S25FL004D
is 12h. This can be read using RES instruction.
The device is first selected by driving Chip Select (CS#) Low. The instruction code
is followed by 3 dummy bytes, each bit being latched-in on Serial Data Input (SI)
during the rising edge of Serial Clock (SCK). Then, the 8-bit Electronic Signature,
stored in the memory, is shifted out on Serial Data Output (SO), each bit being
shifted out during the falling edge of Serial Clock (SCK).
The instruction sequence is shown in Figure 16.
The Release from Deep Power Down and Read Electronic Signature (RES) is ter-
minated by driving Chip Select (CS#) High after the Electronic Signature has
been read at least once. Sending additional clock cycles on Serial Clock (SCK),
while Chip Select (CS#) is driven Low, causes the Electronic Signature to be out-
put repeatedly.
When Chip Select is driven High, the device is put in the Stand-by Power mode.
If the device was not previously in the Deep Power Down mode, the transition to
the Stand-by Power mode is immediate. If the device was previously in the Deep
Power Down mode, though, the transition to the Standby mode is delayed by
tRES, and Chip Select (CS#) must remain High for at lease tRES(max), as specified
in Table 8. Once in the Stand-by Power mode, the device waits to be selected, so
that it can receive, decode and execute instructions.
CS#
SCK
SI
0
1
23
4
5
6
7
Instruction
Deep Power Down Mode
t
RES
Standby Mode
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S25FL004K0XMFI010 功能描述:閃存 4-MBIT CMOS 3V FLASH MEMORY 104MHz SPI RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
S25FL004K0XMFI011 功能描述:閃存 4-MBIT CMOS 3V FLASH MEMORY 104MHz SPI RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
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