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參數資料
型號: S25FL004D
廠商: Spansion Inc.
英文描述: 4 Megabit CMOS 3.0 Volt Flash Memory with 50 Mhz SPI Bus Interface
中文描述: 4兆位的CMOS閃存3.0伏,50赫茲的SPI總線接口
文件頁數: 3/36頁
文件大小: 724K
代理商: S25FL004D
June 28, 2004 S25FL004D_00A0
S25FL Family (Serial Peripheral Interface) S25FL004D
11
Ad va nc e
In forma t i o n
If the falling edge does not coincide with Serial Clock (SCK) being Low, the Hold
condition starts after Serial Clock (SCK) next goes Low. Similarly, if the rising
edge does not coincide with Serial Clock (SCK) being Low, the Hold condition ends
after Serial Clock (SCK) next goes Low (Figure 3). During the Hold condition, the
Serial Data Output (SO) is high impedance, and Serial Data Input (SI) and Serial
Clock (SCK) are Don’t Care.
Normally, the device remains selected, with Chip Select (CS#) driven Low, for the
entire duration of the Hold condition. This ensures that the state of the internal
logic remains unchanged from the moment of entering the Hold condition.
If Chip Select (CS#) goes High while the device is in the Hold condition, this has
the effect of resetting the internal logic of the device. To restart communication
with the device, it is necessary to drive Hold (HOLD#) High, and then to drive
Chip Select (CS#) Low. This prevents the device from going back to the Hold
condition.
Figure 3. Hold Condition Activation
SCK
HOLD#
Hold
Condition
(standard use)
Hold
Condition
(non-standard use)
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