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參數(shù)資料
型號(hào): S25FL064A0LNAI00
廠商: SPANSION LLC
元件分類(lèi): PROM
英文描述: 64M X 1 FLASH 3V PROM, PDSO16
封裝: 0.300 INCH, PLASTIC, MS-013AA, SOP-16
文件頁(yè)數(shù): 10/36頁(yè)
文件大小: 1495K
代理商: S25FL064A0LNAI00
June 29, 2007 S25FL064A_00_C3
S25FL064A
19
Data
She e t
9.4
Write Enable (WREN)
The Write Enable (WREN) command (see Figure 9.4) sets the Write Enable Latch (WEL) bit to a 1, which
enables the device to accept a Write Status Register, program, or erase command. The WEL bit must be set
prior to every Page Program (PP), Erase (SE or BE) and Write Status Register (WRSR) command.
The host system must first drive CS# low, write the WREN command, and then drive CS# high.
Figure 9.4 Write Enable (WREN) Command Sequence
9.5
Write Disable (WRDI)
The Write Disable (WRDI) command (see Figure 9.5) resets the Write Enable Latch (WEL) bit to a 0, which
disables the device from accepting a Write Status Register, program, or erase command. The host system
must first drive CS# low, write the WRDI command, and then drive CS# high.
Any of following conditions resets the WEL bit:
Power-up
Write Disable (WRDI) command completion
Write Status Register (WRSR) command completion
Page Program (PP) command completion
Sector Erase (SE) command completion
Bulk Erase (BE) command completion
Figure 9.5 Write Disable (WRDI) Command Sequence
CS#
SCK
SI
SO
Hi-Z
Command
01
2
3
45 67
Mode 3
Mode 0
0
1 2 3 4 5 6 7
Command
CS#
Hi-Z
SCK
SI
SO
Mode 3
Mode 0
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