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參數(shù)資料
型號: S29AL032D90TFI043
廠商: SPANSION LLC
元件分類: PROM
英文描述: 32 Megabit CMOS 3.0 Volt-only Flash Memory
中文描述: 2M X 16 FLASH 3V PROM, 90 ns, PDSO48
封裝: LEAD FREE, MO-142DD, TSOP-48
文件頁數(shù): 35/67頁
文件大小: 1708K
代理商: S29AL032D90TFI043
38
S29AL032D
S29AL032D_00_A8 November 2, 2006
Da ta
Sh e e t
Legend
Notes
Table 11.2 S29AL032D Command Definitions, x8 Mode — Models 03, 04
Command Sequence
Cyc
le
s
Bus Cycles (Notes 2–5)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
1RA
RD
Reset (Note 7)
1XXX
F0
A
u
to
sel
e
ct
Manufacturer ID
4
AAA
AA
555
55
AAA
90
X00
01
Device ID, Model 03
4
AAA
AA
555
55
AAA
90
X02
22F6
Device ID, Model 04
4
AAA
AA
555
55
AAA
90
X02
F9
Secured Silicon Sector Factory
Protect, Model 03 (Note 9)
4
AAA
AA
555
55
AAA
90
X06
8D/0D
Secured Silicon Sector Factory
Protect, Model 04 (Note 9)
4
AAA
AA
555
55
AAA
90
X06
9D/1D
Sector Protect Verify
4
AAA
AA
555
55
AAA
90
(SA)X04
Enter Secured Silicon Sector Region
3
AAA
AA
555
55
AAA
88
Exit Secured Silicon Sector Region
4
AAA
AA
555
55
AAA
90
XXX
00
CFI Query (Note 11)
1AA
98
Program
4
AAA
AA
555
55
AAA
A0
PA
PD
Unlock Bypass
3
AAA
AA
555
55
AAA
20
Unlock Bypass Program (Note 12)
2
XXX
A0
PA
PD
Unlock Bypass Reset (Note 13)
2
XXX
90
XXX
00
Chip Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
AAA
10
Sector Erase
6
AAA
AA
555
55
AAA
80
AAA
AA
555
55
SA
30
Erase Suspend (Note 14)
1
XXX
B0
Erase Resume (Note 15)
1XXX
30
X = Don’t care
RA = Address of the memory location to be read
RD = Data read from location RA during read operation
PA = Address of the memory location to be programmed. Addresses are latched
on the falling edge of the WE# or CE# pulse, whichever happens later.
PD = Data to be programmed at location PA. Data is latched on the rising edge
of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be erased or verified. Address bits A19–A12
uniquely select any sector.
1. See Table 7.1 on page 12 for description of bus operations.
2. All values are in hexadecimal.
3. Except for the read cycle and the fourth cycle of the autoselect command
sequence, all bus cycles are write cycles.
4. Data bits DQ15–DQ8 are don’t cares for unlock and command cycles.
5. Address bits A19–A11 are don’t cares for unlock and command cycles,
unless SA or PA required.
6. No unlock or command cycles required when reading array data.
7. The Reset command is required to return to reading array data when device
is in the autoselect mode, or if DQ5 goes high (while the device is providing
status data).
8. The fourth cycle of the autoselect command sequence is a read cycle.
9. For Model 03, the data is 8Dh for factory locked and 0Dh for not factory
locked. For Model 04, the data is 9Dh for factory locked and 1Dh for not
factory locked.
10. The data is 00h for an unprotected sector and 01h for a protected sector.
See “Autoselect Command Sequence”for more information.
11. Command is valid when device is ready to read array data or when device is
in autoselect mode.
12. The Unlock Bypass command is required prior to the Unlock Bypass
Program command.
13. The Unlock Bypass Reset command is required to return to reading array
data when the device is in the unlock bypass mode. F0h is also acceptable.
14. The system may read and program in non-erasing sectors, or enter the
autoselect mode, when in the Erase Suspend mode. The Erase Suspend
command is valid only during a sector erase operation.
15. The Erase Resume command is valid only during the Erase Suspend mode.
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