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參數資料
| 型號： | S29AL032D90TFI043 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 32 Megabit CMOS 3.0 Volt-only Flash Memory |
| 中文描述： | 2M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
| 封裝： | LEAD FREE, MO-142DD, TSOP-48 |
| 文件頁數： | 39/67頁 |
| 文件大小： | 1708K |
| 代理商： | S29AL032D90TFI043 |
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42
S29AL032D
S29AL032D_00_A8 November 2, 2006
Da ta
Sh e e t
12.3
DQ6: Toggle Bit I
Toggle Bit I on DQ6 indicates whether an Embedded Program or Erase algorithm is in progress or complete,
or whether the device has entered the Erase Suspend mode. Toggle Bit I may be read at any address, and is
valid after the rising edge of the final WE# pulse in the command sequence (prior to the program or erase
operation), and during the sector erase time-out.
During an Embedded Program or Erase algorithm operation, successive read cycles to any address cause
DQ6 to toggle. (The system may use either OE# or CE# to control the read cycles.) When the operation is
complete, DQ6 stops toggling.
After an erase command sequence is written, if all sectors selected for erasing are protected, DQ6 toggles for
approximately 100 s, then returns to reading array data. If not all selected sectors are protected, the
Embedded Erase algorithm erases the unprotected sectors, and ignores the selected sectors that are
protected.
The system can use DQ6 and DQ2 together to determine whether a sector is actively erasing or is erase-
suspended. When the device is actively erasing (that is, the Embedded Erase algorithm is in progress), DQ6
toggles. When the device enters the Erase Suspend mode, DQ6 stops toggling. However, the system must
also use DQ2 to determine which sectors are erasing or erase-suspended. Alternatively, the system can use
DQ7 (see the subsection on DQ7: Data# Polling on page 40).
If a program address falls within a protected sector, DQ6 toggles for approximately 1 s after the program
command sequence is written, then returns to reading array data.
DQ6 also toggles during the erase-suspend-program mode, and stops toggling once the Embedded Program
algorithm is complete.
Table 12.1 on page 44 shows the outputs for Toggle Bit I on DQ6. Figure 12.2 on page 43 shows the toggle
bit algorithm in flowchart form, and the section Reading Toggle Bits DQ6/DQ2 on page 42 explains the
algorithm. Figure 17.9 on page 55 shows the toggle bit timing diagrams. Figure 17.10 on page 55 shows the
differences between DQ2 and DQ6 in graphical form. See also the subsection on DQ2: Toggle Bit II.
12.4
DQ2: Toggle Bit II
The Toggle Bit II on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that
is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is
valid after the rising edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that have been selected for erasure.
(The system may use either OE# or CE# to control the read cycles.) But DQ2 cannot distinguish whether the
sector is actively erasing or is erase-suspended. DQ6, by comparison, indicates whether the device is
actively erasing, or is in Erase Suspend, but cannot distinguish which sectors are selected for erasure. Thus,
both status bits are required for sector and mode information. Refer to Table 12.1 on page 44 to compare
outputs for DQ2 and DQ6.
Figure 12.2 on page 43 shows the toggle bit algorithm in flowchart form, and the section Reading Toggle Bits
DQ6/DQ2 on page 42 explains the algorithm. See also the DQ6: Toggle Bit I subsection. Figure 17.9 on page
55 shows the toggle bit timing diagram. Figure 17.10 on page 55 shows the differences between DQ2 and
DQ6 in graphical form.
12.5
Reading Toggle Bits DQ6/DQ2
Refer to Figure 12.2 on page 43 for the following discussion. Whenever the system initially begins reading
toggle bit status, it must read DQ7–DQ0 at least twice in a row to determine whether a toggle bit is toggling.
Typically, the system would note and store the value of the toggle bit after the first read. After the second
read, the system would compare the new value of the toggle bit with the first. If the toggle bit is not toggling,
the device has completed the program or erase operation. The system can read array data on DQ7–DQ0 on
the following read cycle.
However, if after the initial two read cycles, the system determines that the toggle bit is still toggling, the
system also should note whether the value of DQ5 is high (see the section on DQ5). If it is, the system should
then determine again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as
DQ5 went high. If the toggle bit is no longer toggling, then the device has successfully completed the program
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