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參數(shù)資料
| 型號： | S29AL032D90TFI043 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 32 Megabit CMOS 3.0 Volt-only Flash Memory |
| 中文描述： | 2M X 16 FLASH 3V PROM, 90 ns, PDSO48 |
| 封裝： | LEAD FREE, MO-142DD, TSOP-48 |
| 文件頁數(shù)： | 7/67頁 |
| 文件大小： | 1708K |
| 代理商： | S29AL032D90TFI043 |
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November 2, 2006 S29AL032D_00_A8
S29AL032D
13
Data
She e t
7.2
Requirements for Reading Array Data
To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power
control and selects the device. OE# is the output control and gates array data to the output pins. WE# should
remain at VIH. The BYTE# pin determines whether the device outputs array data in words or bytes.
The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This
ensures that no spurious alteration of the memory content occurs during the power transition. No command is
necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses
on the device-address inputs produce valid data on the device-data outputs. The device remains enabled for
read access until the command register contents are altered.
See Reading Array Data on page 32 for more information. Refer to the AC Read Operations on page 49
table for timing specifications and to Figure 17.1 on page 49 for the timing diagram. ICC1 in the DC
Characteristics table represents the active current specification for reading array data.
7.3
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data to the device and erasing
sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH.
For program operations, the BYTE# pin determines whether the device accepts program data in bytes or
words. Refer to Word/Byte Configuration (Models 03, 04 Only) on page 12 for more information.
The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the
Unlock Bypass mode, only two write cycles are required to program a word or byte, instead of four. Word/
Byte Program Command Sequence on page 33 has details on programming data to the device using both
standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device. Table 7.3 on page 15 and
Table 7.5 on page 17 indicate the address space that each sector occupies. A sector address consists of the
address bits required to uniquely select a sector. The Command Definitions on page 32 contains details on
erasing a sector or the entire chip, or suspending/resuming the erase operation.
After the system writes the autoselect command sequence, the device enters the autoselect mode. The
system can then read autoselect codes from the internal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in this mode. Refer to Autoselect Mode on page 21 and
Autoselect Command Sequence on page 32 for more information.
ICC2 in the DC Characteristics table represents the active current specification for the write mode. AC
Characteristics on page 49 contains timing specification tables and timing diagrams for write operations.
7.4
Program and Erase Operation Status
During an erase or program operation, the system may check the status of the operation by reading the
status bits on DQ7–DQ0. Standard read cycle timings and ICC read specifications apply. Refer to Write
Operation Status on page 40 for more information, and to AC Characteristics on page 49 for timing
diagrams.
7.5
Accelerated Program Operation
The device offers accelerated program operations through the ACC function. This is one of two functions
provided by the WP#/ACC (ACC on Model 00) pin. This function is primarily intended to allow faster
manufacturing throughput at the factory.
If the system asserts VHH on this pin, the device automatically enters the previously mentioned Unlock
Bypass mode, temporarily unprotects any protected sectors, and uses the higher voltage on the pin to reduce
the time required for program operations. The system would use a two-cycle program command sequence as
required by the Unlock Bypass mode. Removing VHH from the WP#/ACC pin returns the device to normal
operation. Note that the WP#/ACC pin must not be at VHH for operations other than accelerated
programming, or device damage may result. In addition, the WP#/ACC pin must not be left floating or
unconnected; inconsistent behavior of the device may result.
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