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參數資料
型號： TMX320F2810PBKA
廠商： Texas Instruments, Inc.
元件分類： 數字信號處理
英文描述： DIGITAL SIGNAL PROCESSORS
中文描述： 數字信號處理器
文件頁數： 35/103頁
文件大小： 1341K
代理商： TMX320F2810PBKA
TMS320F2810, TMS320F2812
DIGITAL SIGNAL PROCESSORS
SPRS174B
–
APRIL 2001
–
REVISED SEPTEMBER 2001
35
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251
–
1443
interrupts (continued)
Eight PIE block interrupts are grouped into one CPU interrupt. In total, 12 CPU interrupt groups, with 8 interrupts
per group equals 96 possible interrupts. On the F2810/F2812, 45 of these are used by peripherals as shown
in Table 18.
INT12
MUX
INT11
INT2
INT1
CPU
(Enable)
(Flag)
INTx
INTx.8
PIEIERx(7:1)
PIEIFRx(7:1)
MUX
INTx.7
INTx.6
INTx.5
INTx.4
INTx.3
INTx.2
INTx.1
From
Peripherals or
External
Interrupts
(Enable)
(Flag)
IER(12:1)
IFR(12:1)
Global
Enable
INTM
1
0
Figure 6. Multiplexing of Interrupts Using the PIE Block
Table 18. PIE Peripheral Interrupts
CPU
PIE INTERRUPTS
INTx.4
INTERRUPTS
INTx.1
PDPINTA
(EV-A)
CMP1INT
(EV-A)
T2PINT
(EV-A)
CMP4INT
(EV-B)
T4PINT
(EV-B)
SPIAINT
(SPI)
reserved
reserved
RXAINT
(SCI-A)
reserved
reserved
reserved
INTx.2
PDPINTB
(EV-B)
CMP2INT
(EV-A)
T2CINT
(EV-A)
CMP5INT
(EV-B)
T4CINT
(EV-B)
SPIATX
(SPI)
reserved
reserved
TXAINT
(SCI-A)
reserved
reserved
reserved
INTx.3
INTx.5
INTx.6
ADCINT
(ADC)
T1UFINT
(EV-A)
CAPINT2
(EV-A)
T3UFINT
(EV-B)
CAPINT5
(EV-B)
MXINT
(McBSP)
reserved
reserved
HECC1INT
(CAN)
reserved
reserved
reserved
INTx.7
TINT0
(TIMER 0)
T1OFINT
(EV-A)
CAPINT3
(EV-A)
T3OFINT
(EV-B)
CAPINT6
(EV-B)
INTx.8
WAKEINT
(LPM/WD)
INT1
reserved
XINT1
XINT2
INT2
CMP3INT
(EV-A)
T2UFINT
(EV-A)
CMP6INT
(EV-B)
T4UFINT
(EV-B)
T1PINT
(EV-A)
T2OFINT
(EV-A)
T3PINT
(EV-B)
T4OFINT
(EV-B)
T1CINT
(EV-A)
CAPINT1
(EV-A)
T3CINT
(EV-B)
CAPINT4
(EV-B)
MRINT
(McBSP)
reserved
reserved
HECC0INT
(CAN)
reserved
reserved
reserved
reserved
INT3
reserved
INT4
reserved
INT5
reserved
INT6
reserved
reserved
reserved
reserved
INT7
INT8
reserved
reserved
RXBINT
(SCI-B)
reserved
reserved
reserved
reserved
reserved
TXBINT
(SCI-B)
reserved
reserved
reserved
reserved
reserved
reserved
reserved
INT9
reserved
reserved
INT10
INT11
INT12
reserved
reserved
reserved
reserved
reserved
reserved
Out of the 96 possible interrupts, 45 interrupts are currently used. the remaining interrupts are reserved for future devices. However, these
interrupts can be used as software interrupts if they are enabled at the PIEIFRx level.
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