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參數(shù)資料
| 型號： | μPD30121 |
| 廠商： | NEC Corp. |
| 英文描述： | 64-Bit MIPS RISC Microprocessor(64 位RISC 微處理器) |
| 中文描述： | 64位MIPS RISC微處理器（64位的RISC微處理器） |
| 文件頁數(shù)： | 1/2頁 |
| 文件大小： | 21K |
| 代理商： | ΜPD30121 |
Application Note
July 1998
Introduction
The V
R
4101
TM,
V
R
4102
TM,
and V
R
4111
TM
devices, members of the V
R
4100
TM
family of 64-bit
MIPS RISC microprocessors, have four power modes: full speed, standby, suspend, and
hibernate. Executing a STANDBY, SUSPEND, or HIBERNATE instruction switches from full-
speed mode; generating an interrupt or performing a reset switches back to full-speed mode.
Figure 1. Power Mode State Transition
Standby
Mode
98YL-0158A (6/98)
Hibernate
Mode
Suspend
Mode
Full-speed
Mode
(2)
(1)
(3)
(4)
(5)
(6)
Table 1. Power Mode State Transition
1
2
3
4
5
6
STANDBY
Instruction and
Pipeline flash and
SysAD idle and
PClock high
All interrupts
SUSPEND
Instruction and
Pipeline flash and
SysAD idle and
PClock high and
TClock high and
DRAM self-refresh
BatteryInt
POWERON
RTCRST
Alarm
KeyTouch
PenTouch
GPIO[3~0]
GPIO[14~9]
DCD#
RTCLong
HIBERNATE
Instruction and
Pipeline flash and
SysAD Idle and
TClock high and
MasterOut high and
DRAM self-refresh
POWERON
Alarm
DCD#
GPIO[3~0]
GPIO[12~9]
Table 2. Peripherals and CPU Core
Mode
Real-Time Clock
Interrupt Control Unit
DMA Control Unit
Others
CPU Core On
Full speed
On
On
On
Selectable
On
Standby
On
On
On
Selectable
Off
Suspend
On
On
Off
Off
Off
Hibernate
On
Off
Off
Off
Off
Off
Off
Off
Off
Off
Off
Power Management Modes
In the V
R
4100 Family of
64-Bit MIPS RISC Microprocessors
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