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參數(shù)資料
| 型號(hào)： | 100336D |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 通用總線功能 |
| 英文描述： | Low Power 4-Stage Counter/Shift Register |
| 中文描述： | 低功耗4級(jí)計(jì)數(shù)器/移位寄存器 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大小： | 318K |
| 代理商： | 100336D |
100336
Low Power 4-Stage Counter/Shift Register
General Description
The 100336 operates as either a modulo-16 up/down
counter or as a 4-bit bidirectional shift register. Three Select
(S
) inputs determine the mode of operation, as shown in the
Function Select table. Two Count Enable (CEP, CET) inputs
are provided for ease of cascading in multistage counters.
One Count Enable (CET) input also doubles as a Serial Data
(D
) input for shift-up operation. For shift-down operation, D
3
is the Serial Data input. In counting operations the Terminal
Count (TC) output goes LOW when the counter reaches 15
in the count/up mode or 0 (zero) in the count/down mode. In
the shift modes, the TC output repeats the Q
3
output. The
dual nature of this TC/Q
output and the D
/CET input
means that one interconnection from one stage to the next
higher stage serves as the link for multistage counting or
shift-up operation. The individual Preset (P
n
) inputs are used
to enter data in parallel or to preset the counter in program-
mable counter applications.AHIGH signal on the Master Re-
set (MR) input overrides all other inputs and asynchronously
clears the flip-flops. In addition, a synchronous clear is pro-
vided, as well as a complement function which synchro-
nously inverts the contents of the flip-flops.All inputs have 50
k
pull-down resistors.
Features
n
40% power reduction of the 100136
n
2000V ESD protection
n
Pin/function compatible with 100136
n
Voltage compensated operating range = 4.2V to 5.7V
n
Standard Microcircuit Drawing
(SMD) 5962-9230601
Logic Symbol
Pin
Names
CP
CEP
D
0
/CET
Description
Clock Pulse Input
Count Enable Parallel Input (Active LOW)
Serial Data Input/Count Enable
Trickle Input (Active LOW)
Select Inputs
Master Reset Input
Preset Inputs
Serial Data Input
Terminal Count Output
Data Outputs
Complementary Data Outputs
S
0
–S
2
MR
P
0
–P
3
D
3
TC
Q
0
–Q
3
Q
0
–Q
3
DS100307-1
August 1998
1
1998 National Semiconductor Corporation
DS100307
www.national.com
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 100336F | Low Power 4-Stage Counter/Shift Register |
| 100336 | Low Power 4-Stage Counter/Shift Register |
| 100336PC | Low Power 4-Stage Counter/Shift Register |
| 100336SC | Low Power 4-Stage Counter/Shift Register |
| 100336QCX | Counter/Shift Register |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 100336DC | 功能描述:計(jì)數(shù)器 IC 4-STAGE COUNTER RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| 100336DCQR | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Counter/Shift Register |
| 100336DM | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Counter/Shift Register |
| 100336DMQB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Counter/Shift Register |
| 100336DMQB | 制造商:Texas Instruments 功能描述:Counter/Shift Register Single 4-Bit Binary UP/Down 24-Pin CDIP |
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