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參數(shù)資料
| 型號： | 100397QIX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | ECL-to-TTL Translator |
| 中文描述： | QUAD TTL TO ECL TRANSCEIVER, COMPLEMENTARY OUTPUT, PQCC28 |
| 封裝： | 0.450 X 0.450 INCH, PLASTIC, MO-047, LCC-28 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大小： | 129K |
| 代理商： | 100397QIX |
2000 Fairchild Semiconductor Corporation
DS010971
www.fairchildsemi.com
January 1992
Revised August 2000
1
100397
Quad Differential ECL/TTL Translating Transceiver
with Latch
General Description
The 100397 is a quad latched transceiver designed to con-
vert TTL logic levels to differential F100K ECL logic levels
and vice versa. This device was designed with the capabil-
ity of driving a differential 25
ECL load with cutoff capabil-
ity, and will sink a 64 mA TTL load. The 100397 is ideal for
mixed technology applications utilizing either an ECL or
TTL backplane.
The direction of translation is set by the direction control
pin (DIR). The DIR pin on the 100397 accepts F100K ECL
logic levels. An ECL LOW on DIR sets up the ECL pins as
inputs and TTL pins as outputs. An ECL HIGH on DIR sets
up the TTL pins as inputs and ECL pins as outputs.
A LOW on the output enable input pin (OE) holds the ECL
output in a cut-off state and the TTL outputs at a high
impedance level. A HIGH on the latch enable input (LE)
latches the data at both inputs even though only one output
is enabled at the time. A LOW on LE makes the latch trans-
parent.
The cut-off state is designed to be more negative than a
normal ECL LOW level. This allows the output emitterfol-
lowers to turn off when the termination supply is
2.0V, pre-
senting a high impedance to the data bus. This high
impedance reduces termination power and prevents loss of
low state noise margin when several loads share the bus.
The 100397 is designed with FAST
TTL output buffers,
featuring optimal DC drive and capable of quickly charging
and discharging highly capacitive loads. All inputs have
50 K
pull-down resistors.
Features
I
Differential ECL input/output structure
I
64 mA FAST TTL outputs
I
25
differential ECL outputs with cut-off
I
Bi-directional translation
I
2000V ESD protection
I
Latched outputs
I
3-STATE outputs
I
Voltage compensated operating range
=
4.2V to
5.7V
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
FAST
is a registered trademark of Fairchild Semiconductor Corporation.
Order Number
100397PC
100397QC
100397QI
Package Number
N24E
V28A
V28A
Package Description
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Industrial Temperature Range (
40
°
C to
+
85
°
C)
相關PDF資料 |
PDF描述 |
|---|---|
| 100397QI | Quad Differential ECL/TTL Translating Transceiver with Latch |
| 100397QC | Quad Differential ECL/TTL Translating Transceiver with Latch |
| 100398PC | Quad Differential ECL/TTL Translating Transceiver with Latch |
| 100398 | Quad Differential ECL/TTL Translating Transceiver with Latch(帶寄存器的四差分ECL/TTL電平轉(zhuǎn)換收發(fā)器) |
| 100398QCX | ECL-to-TTL Translator |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 100398 | 制造商:Brady Corporation 功能描述: |
| 100398 WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 10039804-107 | 制造商:MISCELLANEOUS 功能描述: |
| 10039845-001CLF | 功能描述:I/O 連接器 10039845-001CLF-SAS RECEPTACLE WB SMT RoHS:否 制造商:Hirose Connector 產(chǎn)品:Plugs 系列:DH 端口數(shù)量: 位置/觸點數(shù)量:51 節(jié)距:1 mm 觸點電鍍: 觸點材料: 型式:Male 電流額定值:0.5 A 安裝風格:Cable 端接類型:IDC 顏色: 安裝角: |
| 10039845-001C-TRLF | 功能描述:I/O 連接器 10039845-001C-TRLF-SAS RECEPTACLE WB SMT RoHS:否 制造商:Hirose Connector 產(chǎn)品:Plugs 系列:DH 端口數(shù)量: 位置/觸點數(shù)量:51 節(jié)距:1 mm 觸點電鍍: 觸點材料: 型式:Male 電流額定值:0.5 A 安裝風格:Cable 端接類型:IDC 顏色: 安裝角: |
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