
8-34
MIC58P42
Micrel
VEE
OUTPUT
ENABLE/RESET
STROBE
SERIAL DATA OUT
VDD
VSS
SERIAL DATA IN
CLOCK
VEE
K
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
S
L
SUB
UVLO
THERMAL
SHUTDOWN
I LIMIT
SUB
9
8
7
6
5
4
3
2
1
10
11
12
13
14
15
16
17
18
General Description
The MIC58P42 serial-input latched driver is a high-voltage
(80V), high-current (500mA) integrated circuit comprised of
eight CMOS data latches, a bipolar Darlington transistor
driver for each latch, and CMOS control circuitry for the
common STROBE, CLOCK, SERIAL DATA INPUT, and
OUTPUT ENABLE functions. Similar to the MIC5842, addi-
tional protection circuitry supplied on this device includes
thermal shutdown, under voltage lockout (UVLO), and over-
current shutdown.
The bipolar/CMOS combination provides an extremely low-
power latch with maximum interface flexibility. The MIC58P42
has open-collector outputs capable of sinking 500 mA and
integral diodes for inductive load transient suppression with
a minimum output breakdown voltage rating of 80V (50V
sustaining). The drivers can be operated with a split supply,
where the negative supply is down to –20V and may be
paralleled for higher load current capability.
With a 5V logic supply, the MIC58P42 will typically operate at
better than 5MHz. With a 12V logic supply, significantly
higher speeds are obtained. The CMOS inputs are compat-
ible with standard CMOS, PMOS, and NMOS circuits. TTL
circuits may require pull-up resistors. By using the serial data
output, drivers may be cascaded for interface applications
requiring additional drive lines.
Each of these eight outputs has an independent over current
shutdown of 500 mA. Upon over-current detection, the
affected channel will turn OFF until V
is cycled or the
ENABLE/RESET pin is pulsed high. Current pulses less than
2
μ
s will not activate current shutdown. Temperatures above
165
°
C will shut down the device. The UVLO circuit prevents
operation at low V
DD
; hysteresis of 0.5V is provided. See the
MIC59P60 for a similar device that additionally provides an
error flag output.
Features
3.3 MHz Minimum Data-Input Rate
CMOS, PMOS, NMOS, and TTL Compatible
Internal Pull-Up/Pull-Down Resistors
Low Power CMOS Logic and Latches
High Voltage (80V) Current-Sink Outputs
Output Transient-Protection Diodes
Single or Split Supply Operation
Thermal Shutdown
Under-Voltage Lockout
Per-Output Over-Current Shutdown (500mA typical)
Ordering Information
Part Number
Temperature Range
Package
MIC58P42AJ
–55
°
C to +125
°
C
18-Pin Ceramic DIP
MIC58P42AJB
–55
°
C to +125
°
C
18-Pin Ceramic DIP
MIC58P42BN
–40
°
C to +85
°
C
18-Pin Plastic DIP
MIC58P42BV
–40
°
C to +85
°
C
20-Pin PLCC
MIC58P42BWM
–40
°
C to +85
°
C
18-Pin Wide SOIC
Pin Configuration
(Ceramic and Plastic DIP and SOIC)
Functional Diagram
AJB indicates units screened to MIL-STD 883, Method 5004, condition
B, and burned-in for 1 week.
CLOCK
SERIAL
VSS
UVLO
THERMAL
SHUTDOWN
ILIMIT
K
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
SUB
VEE
BIMOS
SERIAL DATA OUT
VDD
STROBE
OUTPUT
8-BIT SERIAL–PARALLEL SHIFT REGISTER
LATCHES
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
MIC58P42
8-Bit Serial-Input Protected Latched Driver