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| 型號： | 1893AG |
| 英文描述： | 3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| 中文描述： | 3.3伏10BASE-T/100BASE-TX快速以太網集成PHYceiver，商標 |
| 文件頁數： | 1/135頁 |
| 文件大小： | 695K |
| 代理商： | 1893AG |
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ICS1893AG, Rev. A 04/14/05
April, 2005
ICS reserves the right to make changes in the device data identified in
this publication without further notice. ICS advises its customers to
obtain the latest version of all device data to verify that any information
being relied upon by the customer is current and accurate.
Integrated Circuit Systems, Inc.
3.3 V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893AG
Document Type:
Data Sheet
Document Stage: Preliminary
Features
Single 3.3 V ±10% power supply
Supports category 5 cables with attenuation in excess of
24dB at 100 MHz across a temperature range from 0°C to
+70°C. Industrial temperature version is also available.
DSP-based baseline wander correction to virtually
eliminate killer packets
Low-power, 0.35-micron CMOS (typically 400 mW)
Single-chip, fully integrated PHY provides PCS, PMA,
PMD, and AUTONEG sublayers of IEEE standard
10Base-T and 100Base-TX IEEE 802.3 compliant
Clock or crystal supported
Media Independent Interface (MII) supported
Managed or Unmanaged Applications
10M or 100M Half and Full Duplex Modes
Auto-Negotiation with Next Page. Parallel detection for
Legacy products
Fully integrated, DSP-based PMD includes:
– Adaptive equalization and baseline wander correction
– Transmit wave shaping and stream cipher scrambler
– MLT-3 encoder and NRZ/NRZI encoder
Loopback mode for Diagnostic Functions
Small footprint 56-pin 240 mil TSSOP package.
General
The ICS1893AG is a re-packaged version of the ICS1893AF
in a 56-lead TSSOP 240 mil package. The ICS1893AG is a
fully integrated, Physical Layer device (PHY) that is
compliant with both the 10Base-T and 100Base-TX
CSMA/CD Ethernet Standard, ISO/IEC 8802-3. The
ICS1893AG uses the same proven silicon as the
ICS1893AF but offers a smaller form factor solution to users
where physical package size is important.
All parametric specification and timing diagrams for the
ICS1893AF apply to the ICS1893AG. Refer to the
ICS1893AF datasheet for detailed specifications and timing.
The ICS1893AG uses the same twisted-pair transmit and
receive circuits as the ICS1893AF, and the same
recommended board layout techniques apply to the
ICS1893AG.
The ICS1893AG is intended for Node applications using the
standard MII interface to the MAC.
Clock
Power
LEDs and PHY
Address
Twisted-
Pair
Interface to
Magnetics
Modules and
RJ45
Connector
Integrated
Switch
MII
Extended
Register
Set
Interface
MUX
ICS1893AG Block Diagram
PCS
Framer
CRS/COL
Detection
Parallel to Serial
4B/5B
Auto-
Negotiation
10Base-T
100Base-TX
TP_PMD
MLT-3
Stream Cipher
Adaptive Equalizer
Baseline Wander
Correction
PMA
Clock Recovery
Link Monitor
Signal Detection
Error Detection
Low-Jitter
Clock
Synthesizer
Configuration
and Status
10/100 MII
MAC
Interface
MII
Management
Interface
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| 1893AGI | 3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| 1893AGILF | 3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| 1893AGLF | 3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| 18947 | Single-/Dual-/Triple-Voltage µP Supervisory Circuits with Independent Watchdog Output |
| 25928 | DRAPER 105-306 WERKZEUGKOFFER KLEIN |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 1893AGI | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| 1893AGILF | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| 1893AGLF | 制造商:ICS 制造商全稱:ICS 功能描述:3.3 V 10Base-T/100Base-TX Integrated PHYceiver-TM |
| 1893AY | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 1893BFILF | 功能描述:以太網 IC 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER RoHS:否 制造商:Micrel 產品:Ethernet Switches 收發器數量:2 數據速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
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