- 您現在的位置：買賣IC網 > PDF目錄293767 > 2417K4A (LSI CORP) TRANSCEIVER, PDFO PDF資料下載
參數資料
| 型號： | 2417K4A |
| 廠商： | LSI CORP |
| 元件分類： | 數字傳輸電路 |
| 英文描述： | TRANSCEIVER, PDFO |
| 文件頁數： | 4/10頁 |
| 文件大小： | 201K |
| 代理商： | 2417K4A |
Lucent Technologies Inc.
3
Advance Data Sheet
NetLight 2417K4A 1300 nm Laser
January 2000
2.5 Gbits/s Transceiver
Electrostatic Discharge
Caution: This device is susceptible to damage as
a result of electrostatic discharge (ESD).
Take proper precautions during both
handling and testing. Follow
EIA* Stan-
dard
EIA-625.
Although protection circuitry is designed into the
device, take proper precautions to avoid exposure to
ESD.
Lucent employs a human-body model (HBM) for ESD
susceptibility testing and protection-design evaluation.
ESD voltage thresholds are dependent on the critical
parameters used to dene the model. A standard HBM
(resistance = 1.5 k
, capacitance = 100 pF) is widely
used and, therefore, can be used for comparison
purposes. The HBM ESD threshold established for the
2417K4A transceiver is
±1000 V.
Application Information
The 2417 receiver section is a highly sensitive ber-
optic receiver. Although the data outputs are digital
logic levels (CML), the device should be thought of as
an analog component. When laying out system applica-
tion boards, the 2417 transceiver should receive the
same type of consideration one would give to a sensi-
tive analog component.
Printed-Wiring Board Layout Consider-
ations
A ber-optic receiver employs a very high gain, wide-
bandwidth transimpedance amplier. This amplier
detects and amplies signals that are only tens of nA in
amplitude when the receiver is operating near its sensi-
tivity limit. Any unwanted signal currents that couple
into the receiver circuitry cause a decrease in the
receiver's sensitivity and can also degrade the perfor-
mance of the receiver's signal detect (SD) circuit. To
minimize the coupling of unwanted noise into the
receiver, careful attention must be given to the printed-
wiring board.
At a minimum, a double-sided printed-wiring board
(PWB) with a large component-side ground plane
beneath the transceiver must be used. In applications
that include many other high-speed devices, a multi-
layer PWB is highly recommended. This permits the
placement of power and ground on separate layers,
which allows them to be isolated from the signal lines.
*
EIA is a registered trademark of Electronic Industries Association.
Multilayer construction also permits the routing of sen-
sitive signal traces away from high-level, high-speed
signal lines. To minimize the possibility of coupling
noise into the receiver section, high-level, high-speed
signals such as transmitter inputs and clock lines
should be routed as far away as possible from the
receiver pins.
Noise that couples into the receiver through the power
supply pins can also degrade performance. It is
recommended that a pi lter, shown in Figure 3, be
used for both the transmitter and receiver power
supplies.
Data and Signal Detect Outputs
Due to the high switching speeds of CML outputs,
transmission line design must be used to interconnect
components. To ensure optimum signal delity, both
data outputs (RD+/RD–) should be terminated identi-
cally. The signal lines connecting the data outputs to
the next device should be equal in length and have
matched impedances. Controlled impedance stripline
or microstrip construction must be used to preserve the
quality of the signal into the next component and to
minimize reections back into the receiver, which could
degrade its performance. Excessive ringing due to
reections caused by improperly terminated signal
lines makes it difcult for the component receiving
these signals to decipher the proper logic levels and
can cause transitions to occur where none were
intended. Also, by minimizing high-frequency ringing,
possible EMI problems can be avoided.
The signal-detect output is positive LVTTL logic. A logic
low at this output indicates that the optical signal into
the receiver has been interrupted or that the light level
has fallen below the minimum signal-detect threshold.
This output should not be used as an error rate indica-
tor, since its switching threshold is determined only by
the magnitude of the incoming optical signal.
Figure 2. Data Input/Output Logic Level Denitions
DATA
SINGLE ENDED
VOH
VOL
DATA
VOH
VOL
DIFFERENTIAL
相關PDF資料 |
PDF描述 |
|---|---|
| 2442BP43C085 | 2442 MHz, CERAMIC BPF |
| 2450-001-X5R0-471M | 1 FUNCTIONS, 500 V, 20 A, FEED THROUGH CAPACITOR |
| 2450-001-X5R0-101K | 1 FUNCTIONS, 500 V, 20 A, FEED THROUGH CAPACITOR |
| 24502BVA | 1K X 4 STANDARD SRAM, 120 ns, CDIP18 |
| 2450LP15A050 | 2450 MHz, BAND PASS FILTER |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 2417K4A(NETLIGHT) | 制造商:AGERE 制造商全稱:AGERE 功能描述:1300 nm Laser 2.5 Gbits/s Transceiver |
| 2418 | 功能描述:螺絲和緊固件 8-32 X .656 SCREW RoHS:否 制造商:Unspecified 產品: 類型:Washer 螺紋大小: 長度: 材料:Steel 電鍍:Nickel 螺絲頭: 螺絲類型: |
| 2418/19 | 制造商:DURABLE OFFICE PRODUCTS 功能描述:BUSINESS CARD EXTN SET PK40 |
| 24180 | 制造商:CANDD 制造商全稱:C&D Technologies 功能描述:Bobbin Wound Surface Mount Inductors |
| 2418000X5U0102AA | 制造商:n/a 功能描述:CAPACITOR |
發布緊急采購，3分鐘左右您將得到回復。