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參數(shù)資料
型號: 3652JG
英文描述: BOARD ADD-ON DUAL PIXEL LVDS PNL
中文描述: 光耦合線性隔離放大器
文件頁數(shù): 12/13頁
文件大小: 127K
代理商: 3652JG
8
3650/52
+
C
R
G1
R
G2
R
IN
V
ISO
V
2
11
10
12
17
(1)
V
1
V
OUT
23
+
C
NOTE: (1) The offset adjustment circutry and power supply connections
have been omitted for simplicity. Refer to Figure 5 for details.
10
6
R
G1 + RG2 + RIN + RO
V
OUT = (V1 – V2) +
V
ISO
IMRR
FIGURE 6a. 3650 with Differential Current Sources.
FIGURE 6b. 3650 with Differential Voltage Sources.
ERROR ANALYSIS
A model of the 3650 suitable for DC error analysis of offset
voltage, voltage drift versus temperature, bias current, etc.,
is shown in Figure 7.
A1 and A2, the input and output stage amplifiers, are consid-
ered to be ideal. Separate external generators are used to
model the offset voltages and bias currents. RIN is assumed
to be small relative to RG1 and RG2 and is therefore omitted
from the gain equation. The feedback configuration, optics
and component matching are such that I1 = I2 = I3 = I4. A
simple circuit analysis gives the following expression for the
+
C
R
IN
V
ISO
I
2
11
10
12
17
(!)
I
1
V
OUT
23
+
C
NOTE: (1) The offset adjustment circutry and power supply connections
have been omitted for simplicity. Refer to Figure 5 for details. (2) IMRR
here is in pA/V, typically 5pA/V at 60Hz and 1pA/V at DC.
V
OUT = (I1 – I2) X 10
6V/A + V
ISO X IMRR
(2)
FIGURE 5. Power and Offset Adjust Connections.
NOTE: (1) Optional Offset Adjust.
+V
CC
–V
CC
R
IN
+15VDC
50k
(1)
15
16
3M
(1)
12
C
Bal
14
13
+V
O
C
–V
O
722
1.3k
32
29
17
23
C
20
26
10k
(1)
–15VDC
Output
Common
P+
V+
E
V–
To
Input
Circuitry
Bal
Model 722 DC/DC
converter or equivalent
+V
–V
+
INPUT CONFIGURATIONS
Some possible input configurations for the 3650 and 3652
are shown in Figures 6a, 6b, 6c. Differential input sources
are used in these examples. For situations with nondifferential
inputs, the appropriate source term should be set to zero in
the gain equations and replaced with a short in the diagrams.
Figure 6a shows the 3650 connected as a transconductance
amplifier with input current sources. Voltage sources are
shown in Figure 6b. In this case the voltages are converted
to currents by RG1 and RG2. As shown by the equations, they
perform as gain setting resistors in the voltage transfer
function. When a single voltage source is used, it is recom-
mended (but not essential) that the gain setting resistor
remain split into two equal halves in order to minimize
errors due to bias currents and common-mode rejection (see
Typical Performance Curves).
Figure 6c illustrates the connections for the 3652 when the
FET buffer amplifiers, A1 and A2, are used. This configura-
tion provides an isolation amplifier with high input imped-
ance (both common-mode and differential, and good com-
mon-mode and isolation-mode rejection. It is a true isolated
instrumentation amplifier which has many benefits for noise
rejection when source impedance imbalances are present.
In the 3652, the voltage gain of the buffer amplifiers is
slightly less than unity, but the gain of the output stage has
been raised to compensate for this so that the overall transfer
function from the
±I or ±I
R inputs to the output is correct. It
should be noted that A1 and A2 are buffer amplifiers. No
summing can be done at the
±I or ±I
R inputs. Figure 6c
shows the +I and –I inputs used. If more input voltage
protection is desired, then the +IR and –IR inputs should be
used. This will increase the input noise due to the contribu-
tion from the 1.6M
resistors, but will provide additional
differential and common-mode protection (10ms rating of
3kV).
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