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參數資料
| 型號： | 3D7428-1 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE |
| 中文描述： | 整體式8位可編程延遲線 |
| 文件頁數： | 1/7頁 |
| 文件大小： | 513K |
| 代理商： | 3D7428-1 |
3D7428
MONOLITHIC 8-BIT
PROGRAMMABLE DELAY LINE
(SERIES 3D7428 – LOW NOISE)
FEATURES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Leading- and trailing-edge accuracy
Programmable via serial or parallel interface
Increment range:
0.25 through 20.0ns
Delay tolerance:
0.5% (See Table 1)
Supply current:
3mA typical
Temperature stability:
±
1.5% max (-40C to 85C)
Vdd stability:
±
0.5% max (4.75V to 5.25V)
FUNCTIONAL DESCRIPTION
The 3D7428 device is a versatile 8-bit programmable monolithic delay
line. The input (IN) is reproduced at the output (OUT) without inversion,
shifted in time as per the user selection. Delay values, programmed
either via the serial or parallel interface, can be varied over 255 equal
steps according to the formula:
T
i,nom
= T
inh
+ i * T
inc
where i is the programmed address, T
inc
is the delay increment (equal
to the device dash number), and T
inh
is the inherent (address zero)
delay. The device features both rising- and falling-edge accuracy.
The all-CMOS 3D7428 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL programmable delay lines. It is offered in a standard 16-pin auto-insertable DIP and a surface mount
16-pin SOL. An 8-pin SOIC package is available for applications where the parallel interface is not needed.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
DELAYS AND TOLERANCES
NUMBER
Inherent
Delay (ns)
Range (ns)
Step (ns)
Frequency
3D7428-0.25
10.5
±
2.0
63.75
±
0.4
0.25
±
0.12
6.25 MHz
3D7428-0.5
10.5
±
2.0
127.5
±
0.5
0.50
±
0.25
3.12 MHz
3D7428-1
10.5
±
2.0
255.0
±
1.0
1.00
±
0.50
1.56 MHz
3D7428-1.5
10.5
±
2.0
382.5
±
1.5
1.50
±
0.75
1.04 MHz
3D7428-2
10.5
±
2.0
510.0
±
2.0
2.00
±
1.00
781 KHz
3D7428-2.5
10.5
±
2.5
637.5
±
2.5
2.50
±
1.25
625 KHz
3D7428-4
13.0
±
4.0
1020
±
3.2
4.00
±
2.00
390 KHz
3D7428-5
15.0
±
5.0
1275
±
4.0
5.00
±
2.50
312 KHz
3D7428-7.5
20.0
±
7.5
1912.5
±
6.0
7.50
±
3.75
208 KHz
3D7428-10
23.5
±
10
2550
±
8.0
10.0
±
5.00
156 KHz
3D7428-15
33.0
±
15
3825
±
12
15.0
±
9.00
104 KHz
3D7428-20
42.0
±
20
5100
±
16
20.0
±
12.0
NOTES: Any delay increment between 0.25 and 20 ns not shown is also available as standard.
See application notes section for more details
PACKAGES
data
delay
devices,
inc.
3
PIN DESCRIPTIONS
IN
Signal Input
OUT
Signal Output
MD
Mode Select
AE
Address Enable
P0-P7 Parallel Data Input
SC
Serial Clock
SI
Serial Data Input
SO
Serial Data Output
VDD
+5 Volts
GND
Ground
1
2
3
4
8
7
6
5
IN
SO
AE
GND
VDD
OUT
SC
SI
3D7428Z-xx SOIC
14
13
12
11
10
3
4
5
6
7
8
SO/P0
MD
P7
P6
SC
P5
SI
16
15
9
1
2
IN
AE
P1
P2
P3
P4
GND
VDD
OUT
3D7428-xx DIP
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
IN
AE
SO/P0
P1
P2
P3
P4
GND
VDD
OUT
MD
P7
P6
SC
P5
SI
3D7428S-xx SOL
here.
here.
INPUT RESTRICTIONS
Absolute Max
Frequency
77 MHz
45 MHz
22 MHz
15 MHz
11 MHz
9.0 MHz
5.6 MHz
4.5 MHz
3.0 MHz
2.2 MHz
1.5 MHz
1.1 MHz
Delay
Delay
Rec’d Max
Rec’d Min
Pulse Width
80.0 ns
160.0 ns
320.0 ns
480.0 ns
640.0 ns
800.0 ns
1280.0 ns
1600.0 ns
2400.0 ns
3200.0 ns
4800.0 ns
6400.0 ns
Absolute Min
Pulse Width
6.5 ns
11.0 ns
22.0 ns
33.0 ns
44.0 ns
55.0 ns
88.0 ns
110.0 ns
165.0 ns
220.0 ns
330.0 ns
440.0 ns
78 KHz
2004 Data Delay Devices
Doc #03003
11/1/04
DATA DELAY DEVICES, INC.
3 Mt. Prospect Ave. Clifton, NJ 07013
1
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