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參數資料
| 型號： | 4246-51 |
| 廠商： | PEREGRINE SEMICONDUCTOR CORP |
| 元件分類： | 開關 |
| 英文描述： | Absorptive SPST UltraCMOS⑩ RF Switch: DC - 5000 MHz |
| 中文描述： | 1 MHz - 5000 MHz RF/MICROWAVE SGL POLE SGL THROW SWITCH, 1.8 dB INSERTION LOSS |
| 封裝： | 3 X 3 MM, GREEN, DFN-6 |
| 文件頁數： | 2/8頁 |
| 文件大小： | 460K |
| 代理商： | 4246-51 |
Product Specification
PE4246
Page 2 of 8
2003-2010 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0090-09
│ UltraCMOS RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe the
same precautions that you would use with other ESD-
sensitive devices. Although this device contains
circuitry to protect it from damage due to ESD,
precautions should be taken to avoid exceeding the
rating specified in Table 3.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS de-
vices are immune to latch-up.
Table 4. Operating Ranges
Notes: 1. A bypass capacitor should be placed as close as possible
to the pin.
2. Both RF pins must be DC blocked by an external capacitor
or held at 0 VDC.
3. The exposed pad must be soldered to the ground plane for
proper switch performance.
Figure 3. Pin Configuration
Table 5. Control Logic Truth Table
Exceeding absolute maximum ratings may cause
permanent damage. Operation should be restricted to
the limits in the Operating Ranges table. Operation
between operating range maximum and absolute
maximum for extended periods may reduce reliability.
Pin
No.
Pin
Name
Description
1
VDD
Nominal 3 V supply connection.1
2
GND
Ground connection. 3
3
RF1
RF port. 2
4
CTRL
CMOS or TTL logic level:
High = RF1 to RF2 signal path
Low = RF1 isolated from RF2
5
GND
Ground connection. 3
6
RF2
RF port. 2
Symbol
Parameter/Condition
Min
Max
Unit
VDD
Power supply voltage
-0.3
4.0
V
VI
Voltage on CTRL input
-0.3
5.5
V
TST
Storage temperature
-65
150
°C
PIN
Input power (50 ),
CTRL=1/CTRL=0
33/24
dBm
VESD
ESD voltage
(Human Body Model)
200
V
Parameter
Min
Typ
Max
Unit
VDD Power Supply
2.7
3.0
3.3
V
IDD Power Supply Current
(VDD = 3 V, VCNTL = 3 V)
33
40
A
Control Voltage High
0.7xVDD
5
V
Control Voltage Low
0
0.3xVDD
V
TOP Operating temperature
-40
85
°C
Control Voltage
Signal Path
CTRL = CMOS or TTL High
RF1 to RF2
CTRL = CMOS or TTL Low
RF1 isolated from RF2
Exposed
Solder Pad
(bottom side)
V
DD
GND
RF1
RF2
GND
CTRL
4
5
6
3
2
1
Device Description
The PE4246 high-isolation SPST RF Switch is
designed to support a variety of applications
where high isolation performance is demanded
and a non-reflective input and output is desired.
This switch is able to replace multiple lesser
performing switches in a very small 3x3 mm DFN
footprint.
Control Logic
The control logic input pin (CTRL) is typically driven by
a 3-volt CMOS logic level signal, and has a threshold of
50% of VDD. For flexibility to support systems that have
5-volt control logic drivers, the control logic input has
been designed to handle a 5-volt logic HIGH signal. (A
minimal current will be sourced out of the VDD pin when
the control logic input voltage level exceeds VDD.)
Moisture Sensitivity Level
The Moisture Sensitivity Level rating for the PE4246 in
the 6-lead 3x3 DFN package is MSL1.
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