- 您現在的位置：買賣IC網 > PDF目錄30631 > 424 (Electronic Theatre Controls, Inc.) 32-Pin DIP 4-Pole Filters PDF資料下載
參數資料
| 型號： | 424 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 32-Pin DIP 4-Pole Filters |
| 中文描述： | 32引腳DIP 4極濾波器 |
| 文件頁數： | 5/12頁 |
| 文件大小： | 419K |
| 代理商： | 424 |
4-Bit Programmable Filters
424 Series
Digital Tuning &
Control Characteristics
25 Locust St, Haverhill, Massachusetts 01830 Tel: 800/252-7074, 978/374-0761 FAX: 978/521-1839
e-mail: sales@freqdev.com Web Address: http://www.freqdev.com
Digital Tuning Characteristics
The digital tuning interface circuits are a parallel set of CMOS
switches which accept CMOS compatible inputs for the four
tuning bits (D0 - D3).
Binary Tuning Range
Pin-Out Key
IN
Analog Input Signal
D
3
Tuning Bit 3 (MSB)
OUT Analog Output Signal
D
2
Tuning Bit 2
GND Power and Signal Return D
1
Tuning Bit 1
+Vs
Supply Voltage, Positive
D
0
Tuning Bit 0 (LSB)
-Vs
Supply Voltage, Negative +5V Logic Power
Os
Offset Adjustment
Data Input Specifications
Input Data Levels
(+5Vdc CMOS Logic)
Input Voltage (Vs=15 Vdc)
Low Level In
0 Vdc min.
0.5 Vdc max.
High Level In
3.5 Vdc min.
5.0 Vdc max.
Input Current
High Level In
-0.4
mA typ.
-2.0
mA max.
Low Level In
+0.4
mA typ.
+2.0
mA max.
Input Capacitance
20 pF typ.
30 pF max.
Input Data Format
Frequency Select Bits
Positive Logic
Logic “1” = (+5Vdc)
Logic “0” = Gnd
Bit Weight
(Binary-Coded)
D
0
LSB (least significant bit)
D
3
MSB (most significant bit)
Frequency Range16:1 Binary Weighted
MSB
---
LSB
Bit
Weight
2
3
2
1
2
0
fc - corner
D
3
D
2
D
1
D
0
frequency
00
0
f
max/16
00
0
1
f
max/8
00
1
f
max/4
01
1
f
max/2
11
1
f
max
Binary Tuning Equation:
fc = (fmax/16) [1+ D3 x 23 + D2 x 22 + D1 x 21 + D0 x 20]
where D1 - D3 = “0” or “1”, and
fmax = Maximum tuning frequency
fc = Corner frequency;
Minimum tunable frequency = fmax/16 (D0 thru D3 = 0);
Minimum frequency step (Resolution) = fmax /16
Discrete Frequencies
FD
0
D
1
D
2
D
3
F
B
00
0
F
1
10
0
F
2
11
0
F
3
11
1
0
F
4
11
1
Discrete Tuning Equation:
fc = FB + D0[
Df0] + D1[Df1] + D2[Df2] + D3[Df3]
Df0, Df1, Df2, Df3 are the incremental frequency shifts for the data
bits D0, D1, D2 and D3. They are selected to realize the five
customer specified programming frequencies FB
F4. Other
programming codes produce valid fc’s between FB and F4.
Bottom View
0.70
0.80
0.00
0.10
1.00
1.50
1.30
1.10
0.50
1.80
1.60
0.30
0.00
0.80
0.90
Gnd Os
-Vs +Vs
D0
D2 D3
D1
+5V
Out
In
4
2
相關PDF資料 |
PDF描述 |
|---|---|
| 428H4B | 32-Pin DIP 8-Pole Filters |
| 428H4E | 32-Pin DIP 8-Pole Filters |
| 428H4EX | 32-Pin DIP 8-Pole Filters |
| 428H4EY | 32-Pin DIP 8-Pole Filters |
| 428L4B | 32-Pin DIP 8-Pole Filters |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 424 120 75 | 制造商:Werma 功能描述:Bulk |
| 424 320 75 | 制造商:Werma 功能描述:Bulk |
| 4-24 COM-LAN 4 | 制造商:FLORIDA MISC. 功能描述: |
| 424.18 | 制造商:TEKO 功能描述:Bulk |
| 424.207 | 制造商:ERNI Electronics 功能描述:424207 STV-B/3-20-M a/b |
發布緊急采購，3分鐘左右您將得到回復。