- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄248600 > 550AC644M531BGR (SILICON LABORATORIES) VCXO, CLOCK, 644.531 MHz, LVPECL OUTPUT PDF資料下載
參數(shù)資料
| 型號： | 550AC644M531BGR |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | XO, clock |
| 英文描述： | VCXO, CLOCK, 644.531 MHz, LVPECL OUTPUT |
| 封裝： | ROHS COMPLIANT, SMD, 6 PIN |
| 文件頁數(shù)： | 1/44頁 |
| 文件大小： | 556K |
| 代理商： | 550AC644M531BGR |
當(dāng)前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁
Rev. 0.5 7/06
Copyright 2006 by Silicon Laboratories
Si550
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO)
10 MHZ TO 1.4 GHZ
Features
Applications
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL circuitry to
provide a low-jitter clock at high frequencies. The Si550 is available with
any-rate output frequency from 10 to 945 MHz and selected frequencies to
1400 MHz. Unlike traditional VCXO’s where a different crystal is required for
each output frequency, the Si550 uses one fixed crystal to provide a wide
range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides superior supply noise rejection,
simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems. The Si550 IC-based VCXO is
factory configurable for a wide variety of user specifications, including
frequency, supply voltage, output format, tuning slope, and temperature
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
Functional Block Diagram
Available with any-rate output
frequencies from 10 MHz to
945 MHz and selected frequencies
to 1.4 GHz
3rd generation DSPLL with
superior jitter performance
3x better frequency stability than
SAW based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, & CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Lead-free/RoHS-compliant
SONET / SDH
xDSL
10 GbE LAN / WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Fixed
Frequency
XO
Any-rate
10-1400 MHz
DSPLL
Clock Synthesis
ADC
VDD
CLK+
CLK–
Vc
OE
GND
Ordering Information:
See page 7.
Pin Assignments:
See page 6.
(Top View)
Si5602
1
2
3
6
5
4
VC
GND
OE
VDD
CLK+
CLK–
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 554QF000261BGR | VCXO, CLOCK, 172.6423 MHz, CMOS/TTL OUTPUT |
| 550AE625M000BG | VCXO, CLOCK, 625 MHz, LVPECL OUTPUT |
| 550AF27M0000BG | VCXO, CLOCK, 27 MHz, LVPECL OUTPUT |
| 550CD89M6000BGR | VCXO, CLOCK, 89.6 MHz, CMOS OUTPUT |
| 550CE135M000BG | VCXO, CLOCK, 135 MHz, CMOS OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 550AC693M483DG | 制造商:Silicon Laboratories Inc 功能描述: |
| 550AC693M483DGR | 制造商:Silicon Laboratories Inc 功能描述: |
| 550AC800M000DG | 功能描述:VCXO振蕩器 SINGLE VCXO 6 PIN 0.5PS RS JTR RoHS:否 制造商:Fox 封裝 / 箱體:5 mm x 3.2 mm 頻率:19.2 Mhz 頻率穩(wěn)定性:2.5 PPM 輸出格式: 封裝:Reel 電源電壓:3 V 端接類型:SMD/SMT 尺寸:3.2 mm W x 5 mm L x 1.5 mm H 最小工作溫度:- 20 C 最大工作溫度:+ 75 C |
| 550AC80M0000DG | 制造商:Silicon Laboratories Inc 功能描述: |
| 550AC826M000DG | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。