- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄34465 > 550AE307M200BGR (SILICON LABORATORIES) VCXO, CLOCK, 307.2 MHz, LVPECL OUTPUT PDF資料下載
參數(shù)資料
| 型號(hào)： | 550AE307M200BGR |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | VCXO, clock |
| 英文描述： | VCXO, CLOCK, 307.2 MHz, LVPECL OUTPUT |
| 封裝： | ROHS COMPLIANT, SMD, 6 PIN |
| 文件頁(yè)數(shù)： | 1/44頁(yè) |
| 文件大小： | 556K |
| 代理商： | 550AE307M200BGR |
當(dāng)前第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)
Rev. 0.5 7/06
Copyright 2006 by Silicon Laboratories
Si550
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO)
10 MHZ TO 1.4 GHZ
Features
Applications
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL circuitry to
provide a low-jitter clock at high frequencies. The Si550 is available with
any-rate output frequency from 10 to 945 MHz and selected frequencies to
1400 MHz. Unlike traditional VCXO’s where a different crystal is required for
each output frequency, the Si550 uses one fixed crystal to provide a wide
range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides superior supply noise rejection,
simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems. The Si550 IC-based VCXO is
factory configurable for a wide variety of user specifications, including
frequency, supply voltage, output format, tuning slope, and temperature
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
Functional Block Diagram
Available with any-rate output
frequencies from 10 MHz to
945 MHz and selected frequencies
to 1.4 GHz
3rd generation DSPLL with
superior jitter performance
3x better frequency stability than
SAW based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, & CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Lead-free/RoHS-compliant
SONET / SDH
xDSL
10 GbE LAN / WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Fixed
Frequency
XO
Any-rate
10-1400 MHz
DSPLL
Clock Synthesis
ADC
VDD
CLK+
CLK–
Vc
OE
GND
Ordering Information:
See page 7.
Pin Assignments:
See page 6.
(Top View)
Si5602
1
2
3
6
5
4
VC
GND
OE
VDD
CLK+
CLK–
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 550CD25M0000BG | VCXO, CLOCK, 25 MHz, CMOS OUTPUT |
| 550CD74M1758BGR | VCXO, CLOCK, 74.1758 MHz, CMOS OUTPUT |
| 550MD155M520BG | VCXO, CLOCK, 155.52 MHz, LVPECL OUTPUT |
| 550BC1000M00BGR | VCXO, CLOCK, 1000 MHz, LVDS OUTPUT |
| 550CC89M3790BGR | VCXO, CLOCK, 89.379 MHz, CMOS OUTPUT |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 550AE448M000DG | 制造商:Silicon Laboratories Inc 功能描述: |
| 550AE460M000DG | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays |
| 550AE460M000DGR | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Tape and Reel |
| 550AE460M800DG | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Trays |
| 550AE460M800DGR | 制造商:Silicon Laboratories Inc 功能描述:OSCILLATOR - Tape and Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。