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參數資料
型號: 550WAFREQBG
廠商: SILICON LABORATORIES
元件分類: VCXO, clock
英文描述: VCXO, CLOCK, 10 MHz - 945 MHz, CMOS OUTPUT
封裝: ROHS COMPLIANT PACKAGE-6
文件頁數: 1/45頁
文件大小: 691K
代理商: 550WAFREQBG
Rev. 0.5 7/06
Copyright 2006 by Silicon Laboratories
Si550
VOLTAGE-CONTROLLED CRYSTAL OSCILLATOR (VCXO)
10 MHZ TO 1.4 GHZ
Features
Applications
Description
The Si550 VCXO utilizes Silicon Laboratories’ advanced DSPLL circuitry to
provide a low-jitter clock at high frequencies. The Si550 is available with
any-rate output frequency from 10 to 945 MHz and selected frequencies to
1400 MHz. Unlike traditional VCXO’s where a different crystal is required for
each output frequency, the Si550 uses one fixed crystal to provide a wide
range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In
addition, DSPLL clock synthesis provides superior supply noise rejection,
simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems. The Si550 IC-based VCXO is
factory configurable for a wide variety of user specifications, including
frequency, supply voltage, output format, tuning slope, and temperature
stability. Specific configurations are factory programmed at time of shipment,
thereby eliminating long lead times associated with custom oscillators.
Functional Block Diagram
Available with any-rate output
frequencies from 10 MHz to
945 MHz and selected frequencies
to 1.4 GHz
3rd generation DSPLL with
superior jitter performance
3x better frequency stability than
SAW based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, & CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Lead-free/RoHS-compliant
SONET / SDH
xDSL
10 GbE LAN / WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Fixed
Frequency
XO
Any-rate
10-1400 MHz
DSPLL
Clock Synthesis
ADC
VDD
CLK+
CLK–
Vc
OE
GND
Ordering Information:
Pin Assignments:
(Top View)
Si5602
1
2
3
6
5
4
VC
GND
OE
VDD
CLK+
CLK–
相關PDF資料
PDF描述
571ACAFREQDGR VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT
571AGAFREQDGR VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT
571AJAFREQDGR VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT
571AKAFREQDGR VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT
571AMAFREQDGR VCXO, CLOCK, 10 MHz - 945 MHz, LVPECL OUTPUT
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