- 您現在的位置：買賣IC網 > PDF目錄116988 > 571TDAFREQDGR (SILICON LABORATORIES) VCXO, CLOCK, 10 MHz - 160 MHz, CMOS OUTPUT PDF資料下載
參數資料
| 型號： | 571TDAFREQDGR |
| 廠商： | SILICON LABORATORIES |
| 元件分類： | VCXO, clock |
| 英文描述： | VCXO, CLOCK, 10 MHz - 160 MHz, CMOS OUTPUT |
| 封裝： | ROHS COMPLIANT PACKAGE-8 |
| 文件頁數： | 1/26頁 |
| 文件大小： | 315K |
| 代理商： | 571TDAFREQDGR |
Rev. 0.31 8/07
Copyright 2007 by Silicon Laboratories
Si570/Si571
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
Si570/Si571
PRELIMINARY DATA SHEET
ANY-RATE I2C PROGRAMMABLE XO/VCXO
Features
Applications
Description
The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are
user-programmable to any output frequency from 10 to 945 MHz and select
frequencies to 1400 MHz with <1 ppb resolution. The device is programmed
via an I2C serial interface. Unlike traditional XO/VCXOs where a different
crystal is required for each output frequency, the Si57x uses one fixed-
frequency crystal and a DSPLL clock synthesis IC to provide any-rate
frequency operation. This IC-based approach allows the crystal resonator to
provide exceptional frequency stability and reliability. In addition, DSPLL
clock synthesis provides superior supply noise rejection, simplifying the task
of generating low-jitter clocks in noisy environments typically found in
communication systems.
Functional Block Diagram
Any-rate programmable output
frequencies from 10 to 945 MHz and
select frequencies to 1.4 GHz
I2C serial interface
3rd generation DSPLL with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available LVPECL, CMOS,
LVDS, and CML outputs
Industry-standard 5x7 mm
package
Pb-free/RoHS-compliant
1.8, 2.5, or 3.3 V supply
SONET / SDH
xDSL
10 GbE LAN / WAN
Low-jitter clock generation
Optical modules
Clock and data recovery
Fixed
Frequency
XO
Any-rate
10-1400 MHz
DSPLL
Clock
Synthesis
CLK-
CLK+
SCL
GND
OE
VDD
SDA
VC
ADC
Si571 only
Ordering Information:
See page 21.
Pin Assignments:
See page 20.
(Top View)
Si5602
Si570
Si571
1
2
3
6
5
4
NC
GND
OE
VDD
CLK+
CLK–
SDA
SCL
8
7
1
2
3
6
5
4
VC
GND
OE
VDD
CLK+
CLK–
SDA
SCL
8
7
相關PDF資料 |
PDF描述 |
|---|---|
| 550MD200M000DG | VCXO, CLOCK, 200 MHz, LVPECL OUTPUT |
| 550MD212M500DGR | VCXO, CLOCK, 212.5 MHz, LVPECL OUTPUT |
| 5G14B-150N-FREQ | VCXO, CLOCK, 1 MHz - 50 MHz, CMOS/TTL OUTPUT |
| 550MF698M812DG | VCXO, CLOCK, 698.812 MHz, LVPECL OUTPUT |
| 550MG019M440DGR | VCXO, CLOCK, 19.44 MHz, LVPECL OUTPUT |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 571Y | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:0.56＇＇Three Digit Numeric LED Display |
| 572 | 功能描述:RCA Phono連接器 PHONO JACK PC RoHS:否 制造商:Neutrik 型式:Male 端接類型:Solder 安裝風格:Cable 方向:Horizontal |
| 572 281 1226 | 制造商:Sharp Microelectronics Corporation 功能描述: |
| 5720 | 功能描述:固定電感器 4500uH 15% RoHS:否 制造商:AVX 電感:10 uH 容差:20 % 最大直流電流:1 A 最大直流電阻:0.075 Ohms 工作溫度范圍:- 40 C to + 85 C 自諧振頻率:38 MHz Q 最小值:40 尺寸:4.45 mm W x 6.6 mm L x 2.92 mm H 屏蔽:Shielded 端接類型:SMD/SMT 封裝 / 箱體:6.6 mm x 4.45 mm |
| 5720.2 | 功能描述:DIN導軌式接線端子 FBK10, Interface ModuleRibbon Cable, 10p RoHS:否 制造商:Phoenix Contact 類型:Feed Through Modular Terminal Block 位置/觸點數量:1 線規量程:26-14 電流額定值:5 A, 15 A 電壓額定值:300 V, 600 V 安裝風格: 端接類型:Push-In |
發布緊急采購，3分鐘左右您將得到回復。