- 您現在的位置：買賣IC網 > PDF目錄68795 > 5962-8990502VEA 2.2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP16 PDF資料下載
參數資料
| 型號： | 5962-8990502VEA |
| 元件分類： | 穩壓器 |
| 英文描述： | 2.2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP16 |
| 封裝： | DIP-16 |
| 文件頁數： | 8/12頁 |
| 文件大小： | 515K |
| 代理商： | 5962-8990502VEA |
5
UC1823A,B/1825A,B
UC2823A,B/2825A,B
UC3823A,B/3825A,B
APPLICATIONS INFORMATION (cont.)
Maximum Duty Cycle vs RT Curve
Oscillator Frequency vs. RT and CT Curve
OSCILLATOR (cont.)
LEADING EDGE BLANKING
The UC3823A,B/3825A,B performs fixed frequency pulse
width modulation control. The UC3823A,B outputs oper-
ate together at the switching frequency and can vary from
0 to some value less than 100%. The UC3825A,B outputs
are alternately controlled. During every other cycle, one
output will be off. Each output then, switches at one-half
the oscillator frequency, varying in duty cycle from 0 to less
than 50%.
To limit maximum duty cycle, the internal clock pulse
blanks both outputs low during the discharge time of the
oscillator. On the falling edge of the clock, the appropriate
output(s) is driven high. The end of the pulse is controlled
by the PWM comparator, current limit comparator, or the
overcurrent comparator.
Normally the PWM comparator will sense a ramp cross-
ing a control voltage (error amp output) and terminate the
pulse. Leading edge blanking (LEB) causes the PWM
comparator to be ignored for a fixed amount of time after
the start of the pulse. This allows noise inherent with
switched mode power conversion to be rejected. The
PWM ramp input may not require any filtering as result of
leading edge blanking.
To program a Leading Edge Blanking period, connect a
capacitor, C, to CLK/LEB. The discharge time set by C and
the internal 10k resistor will determine the blanked inter-
val. The 10k resistor has a 10% tolerance. For more ac-
curacy, an external 2k 1% resistor, R, can be added, re-
sulting in an equivalent resistance of 1.66k with a tolerance
of 2.4%. The design equation is:
tLEB = 0.5 (R | | 10k) C.
Values of R less than 2k should not be used
Leading edge blanking is also applied to the current limit
comparator. After LEB, if the ILIM pin exceeds the one
volt threshold, the pulse is terminated. The over current
comparator, however, is not blanked. It will catch catas-
trophic over current faults without a blanking delay. Any
time the ILIM pin exceeds 1.2V, the fault latch will be set
and the outputs driven low. For this reason, some noise
filtering may be required on the ILIM pin.
LEB Operational Waveforms
UDG-95103
UDG-95104
UDG-95105
相關PDF資料 |
PDF描述 |
|---|---|
| 5962-8990502VEA | 2.2 A SWITCHING CONTROLLER, 1150 kHz SWITCHING FREQ-MAX, CDIP16 |
| 5962-8990503EA | 2.2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, CDIP16 |
| 5962-8997301PA | OP-AMP, 6000 uV OFFSET-MAX, CDIP8 |
| 5962-8997301PX | OP-AMP, 6000 uV OFFSET-MAX, 179 MHz BAND WIDTH, CDIP8 |
| 5962-8997401PA | OP-AMP, CDIP8 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 5962-8991501UA | 制造商:Microsemi Corporation 功能描述:5962-8991501UA - Rail/Tube |
| 5962-8992001VX | 制造商: 功能描述: 制造商:undefined 功能描述: |
| 5962-89920022A | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| 59628992501EA | 制造商:TI 功能描述:SNJ54LS378J |
| 5962-8992501EA | 制造商:Texas Instruments 功能描述:Flip Flop D-Type Bus Interface Pos-Edge 1-Element 16-Pin CDIP Tube 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:FLIP FLOP D-TYPE BUS INTRFC POS-EDGE 1-ELEM 16CDIP - Rail/Tube |
發布緊急采購，3分鐘左右您將得到回復。