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參數資料
| 型號： | 5962-9161301HZX |
| 元件分類： | 電源模塊 |
| 英文描述： | 2-OUTPUT 30 W DC-DC REG PWR SUPPLY MODULE |
| 封裝： | FM-10 |
| 文件頁數： | 8/9頁 |
| 文件大小： | 113K |
| 代理商： | 5962-9161301HZX |
for the master converter part number and a ‘SLV’
suffix is added for slave part number. See Part
Number section.
Inhibit Function
Connecting the inhibit input (Pin 8) to input com-
mon (Pin 10) will cause the converter to shut
down. It is recommended that the inhibit pin be
driven by an open collector device capable of
sinking at least 400 A of current. The open cir-
cuit voltage of the inhibit input is 11.5 ±1 VDC.
EMI Filter
An optional EMI filter (AFC461) will reduce the in-
put ripple current to levels below the limits im-
posed by MIL-STD-461B CEO3.
8
APPLICATION INFORMATION
Device Synchronization
Whenever multiple DC/DC converters are utilized
in a single system, significant low frequency noise
may be generated due to slight differences in the
switching frequencies of the converters (beat
frequency noise). Because of the low frequency
nature of this noise (typically less than 10 KHz), it
is difficult to filter out and may interfere with
proper operation of sensitive systems (communi-
cations, radar or telemetry). Lambda Advanced
Analog offers an option which provides synchroni-
zation of multiple AHE/ATW type converters, thus
eliminating this type of noise.
To take advantage of this capability, the system
designer must assign one of the converters as the
master. Then, by definition, the remaining con-
verters become slaves and will operate at the
masters’ switching frequency. The user should
be aware that the synchronization system is fail-
safe; that is, the slaves will continue operating
should the master frequency be interrupted for
any reason. The layout must be such that the
synchronization output (pin 2) of the master de-
vice is connected to the synchronization input (pin
2) of each slave device. It is advisable to keep
this run short to minimize the possibility of radiat-
ing the 250 KHz switching frequency.
The appropriate parts must be ordered to utilize
this feature. After selecting the converters re-
quired for the system, a ‘MSTR’ suffix is added
Typical Synchronization Connection Diagram
FILTER
ATW2805S/ES-MSTR
ATW2815D/ES-SLV
SLAVE
ATW2812S/ES-SLV
SLAVE
+5V
COMM
+15V
COMM
-15V
+12V
COMM
5
4
5
4
3
4
5
1
10
1
10
1
10
8
2
8
SYSTEM
BUS
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 5962-9161302HZA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H, SLAVE - Rail/Tube |
| 5962-9161303HZA | 制造商:International Rectifier 功能描述:DC/DC CONVERTER, FLANGED, CLASS H, MASTER - Rail/Tube |
| 5962-9161701MXA | 功能描述:靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 5962-9161702MXA | 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 128KBIT 8KX16 70NS 84PIN PGA - Rail/Tube |
| 5962-9161702MYA | 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 128KBIT 8KX16 70NS 84PIN FPAK - Rail/Tube |
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