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參數資料
| 型號： | 5962-9678001QXA |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發器 |
| 英文描述： | LVT SERIES, DUAL 8-BIT TRANSCEIVER, TRUE OUTPUT, CDFP48 |
| 封裝： | CERAMIC, DFP-48 |
| 文件頁數： | 1/19頁 |
| 文件大?。?/td> | 635K |
| 代理商： | 5962-9678001QXA |
www.ti.com
FEATURES
SN54LVTH162245 . . . WD PACKAGE
SN74LVTH162245 . . . DGG OR DL PACKAGE
(TOP VIEW)
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1DIR
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCC
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE
DESCRIPTION/ORDERING INFORMATION
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS260Q – JUNE 1993 – REVISED NOVEMBER 2006
Members of the Texas Instruments Widebus
Family
A-Port Outputs Have Equivalent 22- Series
Resistors, So No External Resistors Are
Required
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation Down
to 2.7 V
Typical V
OLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
I
off and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Distributed V
CC and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
–
2000-V Human-Body Model (A114-A)
–
200-V Machine Model (A115-A)
–
1000-V Charged-Device Model (C101)
The 'LVTH162245 devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.
These devices can be used as two 8-bit transceivers or one 16-bit transceiver. The devices allow data
transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the buses
are effectively isolated.
The logic levels of the direction-control (DIR) input and the output-enable (OE) input activate either the B-port
outputs or the A-port outputs or place both output ports into the high-impedance mode. The device transmits
data from the A bus to the B bus when the B-port outputs are activated, and from the B bus to the A bus when
the A-port outputs are activated. The input circuitry on both A and B ports is always active and must have a logic
HIGH or LOW level applied to prevent excess ICC and ICCZ.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended.
The A-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-
series resistors
to reduce overshoot and undershoot.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1993–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
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