- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄360273 > 5962F9566001VXC 2-Wire, Serial, 8-Bit DACs with Rail-to-Rail Outputs PDF資料下載
參數(shù)資料
| 型號： | 5962F9566001VXC |
| 英文描述： | 2-Wire, Serial, 8-Bit DACs with Rail-to-Rail Outputs |
| 中文描述： | 四2輸入異或（XOR）門 |
| 文件頁數(shù)： | 1/41頁 |
| 文件大小： | 290K |
| 代理商： | 5962F9566001VXC |
當前第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁
REVISIONS
LTR
DESCRIPTION
DATE (
YR-MO-DA
)
APPROVED
A
Add device types 04, 05, and 06. Modify boilerplate to include rad hard
requirements. Editorial changes throughout.
96-03-13
Monica L. Poelking
B
Add device types 07, 08, and 09. Update boilerplate. Editorial changes
throughout. – TVN
98-08-27
Monica L. Poelking
C
In table I, change I
IN
limits; add footnote to I
DDQ
; add t
c
in power-up master reset
timing section; add footnote to V
OS
and V
DIS
. Correct the JTAG timing waveforms.
Change footnote 3/ in table III. – TVN
99-04-28
Monica L. Poelking
D
Add device types 10 and 11. Editorial changes throughout. - TVN
00-06-27
Monica L. Poelking
E
Add notes to memory write and memory read waveforms. Editorial changes
throughout. – TVN
01-03-13
Thomas M. Hess
F
Correct dimension L for case outline Y in figure 1. Also, correct footnote 1/ for
radiation exposure connections in figure 6. – TVN
01-07-27
Thomas M. Hess
REV
B
B
B
D
SHEET
35
36
37
38
REV
D
D
B
B
B
F
D
D
B
D
B
E
E
C
B
F
B
B
B
B
SHEET
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
REV
F
D
D
D
F
D
D
D
D
D
D
D
D
D
REV STATUS
OF SHEETS
SHEET
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PMIC N/A
PREPARED BY
Thomas M. Hess
CHECKED BY
Thomas M. Hess
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43216
http://www.dscc.dla.mil
APPROVED BY
Monica L. Poelking
DRAWING APPROVAL DATE
95-03-31
MICROCIRCUIT, DIGITAL, CMOS, SERIAL
MICROCODED MULTI-MODE INTELLIGENT TERMINAL
AND TRANSCEIVER, SILICON
SIZE
A
CAGE CODE
67268
5962-94663
STANDARD
MICROCIRCUIT
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
REVISION LEVEL
F
SHEET 1 OF 38
DSCC FORM 2233
APR 97
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.
5962-E538-01
相關PDF資料 |
PDF描述 |
|---|---|
| 5962F9566002VCC | Quad 2-input Exclusive OR (XOR) Gate |
| 5962F9566002VXC | 2-Wire, Serial, 8-Bit DACs with Rail-to-Rail Outputs |
| 5962F9566101VRC | 2-Wire, Serial, 8-Bit DACs with Rail-to-Rail Outputs |
| 5962F9566101VXC | 8-Bit D-Type Latch |
| 5962F9566102VRC | 2-Wire, Serial, 8-Bit DACs with Rail-to-Rail Outputs |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| 5962F9568901QXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9568901VXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9568902QXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9568902VXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9666301QXC | 制造商:Intersil Corporation 功能描述: |
發(fā)布緊急采購，3分鐘左右您將得到回復。