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參數資料
| 型號： | 5962F9654501VXC |
| 元件分類： | 編、解碼器及復用、解復用 |
| 英文描述： | ACT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, CDFP16 |
| 封裝： | BOTTOM-BRAZED, CERAMIC, DFP-16 |
| 文件頁數： | 1/10頁 |
| 文件大小： | 239K |
| 代理商： | 5962F9654501VXC |
1
Standard Products
UT54ACS138/UT54ACTS138
3-Line to 8-Line Decoders/Demultiplexers
Datasheet
November 2010
www.aeroflex.com/logic
FEATURES
1.2μ CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 16-pin DIP
- 16-lead flatpack
UT54ACS138 - SMD 5962-96544
UT54ACTS138 - SMD 5962-96545
DESCRIPTION
The UT54ACS138 and the UT54ACTS138 3-line to 8-line de-
coders/demultiplexers are designed to be used in high-perfor-
mance memory-decoding or data-routing applications requiring
very short propagation delay times.
The conditions at the binary select inputs and the three enable
inputs select one of eight output lines. Two active-low and one
active-high enable inputs reduce the need for external gates of
inverters when expanding. A 24-line decoder can be implement-
ed without external inverters and a 32-line decoder requires only
one inverter. An enable input can be used as a data input for
demultiplexing applications.
PINOUTS
16-Pin DIP
Top View
16-Lead Flatpack
Top View
The devices are characterized over full military temperature
range of -55
°C to +125°C.
FUNCTION TABLE
1
2
3
4
5
7
6
16
15
14
13
12
10
11
A
B
C
G2A
G2B
G1
Y7
VDD
Y0
Y1
Y2
Y3
Y4
Y5
8
9
VSS
Y6
1
2
3
4
5
7
6
16
15
14
13
12
10
11
VDD
A
B
C
G2A
G2B
G1
Y7
Y0
Y1
Y2
Y3
Y4
Y5
VSS
Y6
89
ENABLE INPUTS
SELECT INPUTS
OUTPUT
G1
G2A
G2B
C
B
A
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
X
H
X
H
L
X
H
X
H
X
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 5962F9666301QXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9666302QXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9666302VXC | 制造商:Intersil Corporation 功能描述: |
| 5962F9669601VYC | 制造商:Harris Corporation 功能描述: |
| 5962F9671802VXC | 制造商:INTRSL 功能描述: |
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