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參數(shù)資料
| 型號： | 5962R1023305VXC |
| 元件分類： | 多路復用及模擬開關(guān) |
| 英文描述： | 16-CHANNEL, SGL ENDED MULTIPLEXER, CDFP28 |
| 封裝： | CERAMIC, DFP-28 |
| 文件頁數(shù)： | 1/23頁 |
| 文件大?。?/td> | 474K |
| 代理商： | 5962R1023305VXC |
1
FEATURES
16-to-1 Analog Mux
100
Signal paths (typical)
5V single supply
Rail-to-Rail signal handling
Asynchronous RESET input
SPI/QSPI and MICROWIRE compatible serial
interface (UT16MX112)
Asynchronous parallel input Interface (UT16MX110)
Synchronous parallel input Interface (UT16MX111)
LVCMOS/LVTTL compatible inputs (provided by internal
voltage regulator)
2kV ESD Protection (per MIL-STD-883, Method 3015.7)
Operational environment:
- Total ionizing dose: 300 krad(Si)
- SEL immune to a LET of 110 MeV-cm2/mg
- SEU immune to a LET of 62.3 MeV-cm2/mg
Packaging: 28 Lead Ceramic Flatpack
Standard Microcircuit Number 5962-10233
- QML Q, QML V pending
INTRODUCTION
The UT16MX110/111/112 are low voltage analog multiplexers
with a convenient LVCMOS (3.3V) digital interface. The
analog muxes have Break-Before-Make architecture with a low
channel resistance. The muxes support rail-to-rail input signal
levels. The multiplexer supports serial (SPI), or parallel
(asynchronous or synchronous) interface.
The UT16MX110/111/112 operates with a single 5V(+10%)
power supply. The voltage used for the digital circuitry and the
digital I/O is generated internally from the positive analog
supply voltage. Therefore, no external digital voltage supply is
required.
Digital Interface Logic
Digital Interface Inputs
S[0]
S[1]
S[2]
S[15]
COM
Break-Before-Make
Architecture
...
4
Figure 1. UT16MX110/111/112 Block Diagram
Standard Products
UT16MX110/111/112 Analog Multiplexer
Preliminary Data Sheet
August 24, 2011
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