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參數資料
| 型號： | 6501 |
| 廠商： | Fairchild Semiconductor Corporation |
| 英文描述： | 8-Bit Dual Supply Translating Transceiver with 3-STATE Outputs |
| 中文描述： | 8位三雙電源翻譯器態輸出 |
| 文件頁數： | 1/7頁 |
| 文件大小： | 75K |
| 代理商： | 6501 |
2003 Fairchild Semiconductor Corporation
DS011620
www.fairchildsemi.com
July 1993
Revised September 2003
7
74LVX3245
8-Bit Dual Supply Translating Transceiver with
3-STATE Outputs
General Description
The LVX3245 is a dual-supply, 8-bit translating transceiver
that is designed to interface between a 3V bus and a 5V
bus in a mixed 3V/5V supply environment. The Transmit/
Receive (T/R) input determines the direction of data flow.
Transmit (active-HIGH) enables data from A Ports to B
Ports; Receive (active-LOW) enables data from B Ports to
A Ports. The Output Enable input, when HIGH, disables
both A and B Ports by placing them in a high impedance
condition. The A Port interfaces with the 3V bus; the B Port
interfaces with the 5V bus.
The LVX3245 is suitable for mixed voltage applications
such as notebook computers using 3.3V CPU and 5V
peripheral components.
Features
I
Bidirectional interface between 3V and 5V buses
I
Inputs compatible with TTL level
I
3V data flow at A Port and 5V data flow at B Port
I
Outputs source/sink 24 mA
I
Guaranteed simultaneous switching noise level and
dynamic threshold performance
I
Implements proprietary EMI reduction circuitry
I
Functionally compatible with the 74 series 245
Ordering Code:
Devices also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Logic Symbol
Pin Descriptions
Connection Diagram
Order Number
74LVX3245WM
74LVX3245QSC
74LVX3245MTC
Package Number
M24B
MQA24
MTC24
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150" Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names
Description
OE
Output Enable Input
T/R
Transmit/Receive Input
A
0
–
A
7
B
0
–
B
7
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
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