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參數資料
| 型號： | 7016L20JGI |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | SRAM |
| 英文描述： | 16K X 9 DUAL-PORT SRAM, 20 ns, PQCC68 |
| 封裝： | 0.950 X 0.950 INCH, 0.170 INCH HEIGHT, GREEN, PLASTIC, LCC-68 |
| 文件頁數： | 11/20頁 |
| 文件大小： | 164K |
| 代理商： | 7016L20JGI |
6.42
IDT7016S/L
High-Speed 16K x 9 Dual-Port Static RAM
Military, Industrial and Commercial Temperature Ranges
19
semaphore flags. All eight semaphores could be used to divide the Dual-
Port RAM or other shared resources into eight parts. Semaphores can
even be assigned different meanings on different sides rather than being
given a common meaning as was shown in the example above.
Semaphores are a useful form of arbitration in systems like disk
interfaceswheretheCPUmustbelockedoutofasectionofmemoryduring
a transfer and the I/O device cannot tolerate any wait states. With the use
ofsemaphores,oncethetwodeviceshasdeterminedwhichmemoryarea
was“off-limits”totheCPU,boththeCPUandtheI/Odevicescouldaccess
their assigned portions of memory continuously without any wait states.
Semaphoresarealsousefulinapplicationswherenomemory“WAIT”
stateisavailableononeorbothsides.Onceasemaphorehandshakehas
been performed, both processors can access their assigned RAM
Figure 4. IDT7016 Semaphore Logic
D
3190 drw 20
0
D
Q
WRITE
D0
D
Q
WRITE
SEMAPHORE
REQUEST FLIP FLOP
SEMAPHORE
REQUEST FLIP FLOP
LPORT
RPORT
SEMAPHORE
READ
SEMAPHORE
READ
,
segments at full speed.
Another application is in the area of complex data structures. In this
case,blockarbitrationisveryimportant.Forthisapplicationoneprocessor
may be responsible for building and updating a data structure. The other
processor then reads and interprets that data structure. If the interpreting
processorreadsanincompletedatastructure,amajorerrorconditionmay
exist. Therefore, some sort of arbitration must be used between the two
differentprocessors.Thebuildingprocessorarbitratesfortheblock,locks
it and then is able to go in and update the data structure. When the update
is completed, the data structure block is released. This allows the
interpretingprocessortocomebackandreadthecompletedatastructure,
thereby guaranteeing a consistent data structure.
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 7016L20JI | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 144K-Bit 16K x 9-Bit 20ns 68-Pin PLCC 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 144K-Bit 16K x 9-Bit 20ns 68-Pin PLCC Tube 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 144KBIT 16KX9 20NS 68PLCC - Rail/Tube |
| 7016L20JI8 | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 144K-Bit 16K x 9-Bit 20ns 68-Pin PLCC T/R 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 144KBIT 16KX9 20NS 68PLCC - Tape and Reel |
| 7016L20PF | 功能描述:靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7016L20PF8 | 功能描述:靜態隨機存取存儲器 RoHS:否 制造商:Cypress Semiconductor 存儲容量:16 Mbit 組織:1 M x 16 訪問時間:55 ns 電源電壓-最大:3.6 V 電源電壓-最小:2.2 V 最大工作電流:22 uA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:TSOP-48 封裝:Tray |
| 7016L20PFI | 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 144K-Bit 16K x 9-Bit 20ns 80-Pin TQFP 制造商:Integrated Device Technology Inc 功能描述:SRAM Chip Async Dual 5V 144K-Bit 16K x 9-Bit 20ns 80-Pin TQFP Tray 制造商:Integrated Device Technology Inc 功能描述:SRAM ASYNC DUAL 5V 144KBIT 16KX9 20NS 80TQFP - Rail/Tube |
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