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參數資料
| 型號： | 71M6521FE-IGTR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, QFP64 |
| 封裝： | LEAD FREE, LQFP-64 |
| 文件頁數： | 23/103頁 |
| 文件大小： | 1691K |
| 代理商： | 71M6521FE-IGTR/F |
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71M6521DE/71M6521FE
Energy Meter IC
DATA SHEET
OCTOBER 2010
Page: 26 of 103
2005-2010 Teridian Semiconductor Corporation
v1.1
A Maxim Integrated Products Brand
19-5370; 10/10
Timers and Counters
The 80515 has two 16-bit timer/counter registers: Timer 0 and Timer 1. These registers can be configured for counter or timer
operations.
In timer mode, the register is incremented every machine cycle meaning that it counts up after every 12 periods of the MPU
clock signal.
In counter mode, the register is incremented when the falling edge is observed at the corresponding input signal T0 or T1 (T0
and T1 are the timer gating inputs derived from certain DIO pins, see the DIO Ports chapter). Since it takes 2 machine cycles
to recognize a 1-to-0 event, the maximum input count rate is 1/2 of the oscillator frequency. There are no restrictions on the
duty cycle, however to ensure proper recognition of 0 or 1 state, an input should be stable for at least 1 machine cycle.
The timers/counters are controlled by the TCON Register
Timer/Counter Control Register (TCON)
MSB
LSB
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Table 19: The TCON Register
Bit
Symbol
Function
TCON.7
TF1
The Timer 1 overflow flag is set by hardware when Timer 1 overflows. This flag
can be cleared by software and is automatically cleared when an interrupt is
processed.
TCON.6
TR1
Timer 1 Run control bit. If cleared, Timer 1 stops.
TCON.5
TF0
Timer 0 overflow flag set by hardware when Timer 0 overflows. This flag can be
cleared by software and is automatically cleared when an interrupt is processed.
TCON.4
TR0
Timer 0 Run control bit. If cleared, Timer 0 stops.
TCON.3
IE1
Interrupt 1 edge flag is set by hardware when the falling edge on external pin
int1 is observed. Cleared when an interrupt is processed.
TCON.2
IT1
Interrupt 1 type control bit. Selects either the falling edge or low level on input
pin to cause an interrupt.
TCON.1
IE0
Interrupt 0 edge flag is set by hardware when the falling edge on external pin
int0 is observed. Cleared when an interrupt is processed.
TCON.0
IT0
Interrupt 0 type control bit. Selects either the falling edge or low level on input
pin to cause interrupt.
Table 20: The TCON Register Bit Functions
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| 71M6521FE-IM/F | SPECIALTY ANALOG CIRCUIT, QCC68 |
| 71M6521FE-IGT/F | SPECIALTY ANALOG CIRCUIT, QFP64 |
| 71M6531D-IMR/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 71M6521FE-IM | 制造商:Maxim Integrated Products 功能描述:Metering Systems on a Chip - SoC Residential Energy Meter IC |
| 71M6521FE-IM/F | 功能描述:計量片上系統 - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
| 71M6521FEIM-DB | 制造商:Maxim Integrated Products 功能描述:Development Boards & Kits - 8051 71M6521FE Demo Brd |
| 71M6521FE-IMR | 制造商:Maxim Integrated Products 功能描述:Metering Systems on a Chip - SoC Residential Energy Meter IC |
| 71M6521FE-IMR/F | 功能描述:計量片上系統 - SoC Residential Energy Meter IC RoHS:否 制造商:Maxim Integrated 核心:80515 MPU 處理器系列:71M6511 類型:Metering SoC 最大時鐘頻率:70 Hz 程序存儲器大小:64 KB 數據 RAM 大小:7 KB 接口類型:UART 可編程輸入/輸出端數量:12 片上 ADC: 安裝風格:SMD/SMT 封裝 / 箱體:LQFP-64 封裝:Reel |
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