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| 型號： | 71M6531D-IMR/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 封裝： | LEAD FREE, QFN-68 |
| 文件頁數： | 17/120頁 |
| 文件大小： | 2477K |
| 代理商： | 71M6531D-IMR/F |
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FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
v1.3
2005-2010 TERIDIAN Semiconductor Corporation
113
5.9
Pin Descriptions
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output
The circuit number denotes the equivalent circuit, as specified under Section 5.9.4 I/O Equivalent Circuits.
5.9.1
Power and Ground Pins
Table 90: Power and Ground Pins
Name
Type
Circuit
Description
GNDA
P
–
Analog ground: This pin should be connected directly to the ground
plane.
GNDD
P
–
Digital ground: This pin should be connected directly to the ground plane.
V3P3A
P
–
Analog power supply: A 3.3 V power supply should be connected to this
pin, must be the same voltage as V3P3SYS.
V3P3SYS
P
–
System 3.3 V supply. This pin should be connected to a 3.3 V power
supply.
V3P3D
O
13
Auxiliary voltage output of the chip, controlled by the internal 3.3 V selection
switch. In mission mode, this pin is internally connected to V3P3SYS. In
BROWNOUT mode, it is internally connected to VBAT. This pin is floating
in LCD and sleep mode. A bypass capacitor to ground should not exceed
0.1 F.
VBAT
P
12
Battery backup and oscillator power supply. A battery or super-capacitor
is to be connected between VBAT and GNDD. If no battery is used,
connect VBAT to V3P3SYS.
V2P5
O
10
Output of the internal 2.5 V regulator. A 0.1 F capacitor to GNDA
should be connected to this pin.
5.9.2
Analog Pins
Table 91: Analog Pins
Name
Type
Circuit
Description
IA, IB
IAP/IAN,
IBP/IBN
1)
I
6
Line Current Sense Inputs: These pins are voltage inputs to the internal
A/D converter. Typically, they are connected to the outputs of current
sensors. Unused pins must be tied to V3P3A.
VA, VB,
VX
1)
I
6
Line Voltage Sense Inputs: These pins are voltage inputs to the internal
A/D converter. Typically, they are connected to the outputs of resistor
dividers. Unused pins must be tied to V3P3A.
The VX pin is not supported by standard CE code.
V1
I
7
Comparator Input: This pin is a voltage input to the internal comparator.
The voltage applied to the pin is compared to the internal BIAS voltage
(1.6 V). If the input voltage is above VBIAS, the comparator output will
be high (1). If the comparator output is low, a voltage fault will occur. A
series resistor should be connected from V1 to the resistor divider to
provide hysteresis.
VREF
O
9
Voltage Reference for the ADC. Normally disabled and left unconnected.
If enabled, a 0.1 F capacitor to V3P3A should be connected to this pin.
XIN
XOUT
I
8
Crystal Inputs: A 32 kHz crystal should be connected across these pins.
Typically, a 33 pF capacitor is also connected from XIN to GNDA and a
15 pF capacitor is connected from XOUT to GNDA. It is important to
minimize the capacitance between these pins. See the crystal manufacturer
datasheet for details.
If an external clock is used, a 150 mV (p-p) clock signal should be applied
to XIN, and XOUT should be left unconnected.
1) Differential pin pairs IAP/IAN and IBP/IBN, as well as single-ended VX pin used on 71M6532D/F only.
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