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參數資料
型號: 71M6532F-IGTR/F
廠商: TERIDIAN SEMICONDUCTOR CORP
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP100
封裝: LEAD FREE, LQFP-100
文件頁數: 97/120頁
文件大小: 2477K
代理商: 71M6532F-IGTR/F
Data Sheet 71M6531D/F-71M6532D/F
FDS 6531/6532 005
78
2005-2010 TERIDIAN Semiconductor Corporation
v1.3
Name
Location
Reset
Wake
Dir
Description
COMP_STAT[0]
2003[0]
R
Status bit for the V1 comparator (same as V1_OK, see TMUXOUT)
DI_RPB[2:0]
DIO_R1[2:0]
DIO_R2[2:0]
DIO_R4[2:0]
DIO_R5[2:0]
DIO_R6[2:0]
DIO_R7[2:0]
DIO_R8[2:0]
DIO_R9[2:0]
DIO_R10[2:0]
DIO_R11[2:0]
DIO_RRX[2:0]
2009[2:0]
2009[6:4]
200A[2:0]
200B[2:0]
200B[6:4]
200C[2:0]
200C[6:4]
200D[2:0]
200D[6:4]
200E[2:0]
200E[6:4]
20AF[2:0]
0
R/W
Connects dedicated I/O pins DIO2 and DIO4 through DIO11 as well as input pins PB,
DIO1 and RX to internal resources. If more than one input is connected to the same
resource, the Multiple column in the table below specifies how they are combined.
DIO_Rx[2:0]
Resource
Multiple
000
NONE
001
Reserved
OR
010
T0 (Counter /Timer 0 clock or gate)
OR
011
T1 (Counter /Timer 1 clock or gate)
OR
100
High priority IO interrupt (int0 rising)
OR
101
Low priority IO interrupt (int1 rising)
OR
110
High priority IO interrupt (int0 fall-
ing)
OR
111
Low priority IO interrupt (int1 falling)
OR
DIO_DIR0[7:1]
SFR A2 [7:1]
0
R/W
Programs the direction of DIO pins 7 through 1. 1 indicates an output. The bits are
ignored if the pin is not configured as DIO. See DIO_PV and DIO_PW for special options
for DIO6 and DIO7. See DIO_EEX[1:0] for special options for DIO4 and DIO5.
DIO_DIR1[7:0]
SFR 91
0
R/W
Programs the direction of DIO pins 15 through 8. 1 indicates an output. The bits are
ignored if the pin is not configured as I/O. See DIO_PX and DIO_PW for special options
for the DIO8 and DIO9 outputs.
DIO_DIR2[1]
SFR A1[1]
0
R/W
Programs the direction of DIO17.
DIO_0[7:0]
DIO_1[7:0]
DIO_2[1]
DIO_3[5:4]
SFR 80
SFR 90
SFR A0[1]
SFR B0[5:4]
0
R/W
The value on the DIO pins. Pins configured as LCD will read zero. When written, changes
data on pins configured as outputs. Pins configured as LCD or input will ignore writes.
DIO_0[7:1] corresponds to DIO7 through DIO1. PB is read on DIO_0[0].
DIO_1[7:0] corresponds to DIO15 through DIO8.
DIO_2[1] corresponds to DIO17.
DIO_3[5:4] corresponds to DIO28 and DIO29.
DIO_EEX[1:0]
2008[7:6]
0
R/W
When set, converts DIO4 and DIO5 to interface with external EEPROM. DIO4 becomes
SDCK and DIO5 becomes bi-directional SDATA.
DIO_EEX[1:0]
Function
00
Disable EEPROM interface
01
2-Wire EEPROM interface
10
3-Wire EEPROM interface
11
not used
相關PDF資料
PDF描述
71M6532D-IGT/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP100
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