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參數資料
| 型號： | 73S1210F-68IM/F |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68 |
| 封裝： | LEAD FREE, QFN-68 |
| 文件頁數： | 30/126頁 |
| 文件大小： | 1231K |
| 代理商： | 73S1210F-68IM/F |
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DS_1210F_001
73S1210F Data Sheet
Rev. 1.4
125
Revision History
Revision
Date
Description
1.0
5/10/2007
First publication.
1.1
11/6/2007
In Table 1, added Equivalent Circuit references.
In Section 1.4, updated program security description to remove pre-boot
and 32-cycle references.
In Section 1.7.1, changed “Mcount is configured in the MCLKCtl register
must be bound between a value of 1 to 7. The possible crystal or external
clock are shown in Table 12.“ to “Mcount is configured in the MCLKCtl
register must be bound between a value of 1 to 7. The possible crystal or
external clock frequencies for getting MCLK = 96MHz are shown in Table
11.”
In the BRCON description, changed “If BSEL = 1, the baud rate is derived
using timer 1.” to “If BSEL = 0, the baud rate is derived using timer 1.”
In Section 1.7.14, removed the following from the emulator port
description: “The signals of the emulator port have weak pull-ups. Adding
resistor footprints for signals E_RST, E_TCLK and E_RXTX on the PCB is
recommended. If necessary, adding 10K
pull-up resistors on E_TCLK
and E_RXTX and a 3K
on E_RST will help the emulator operate
normally if a problem arises.”
In Ordering Information, removed the leaded part numbers.
1.2
12/15/2008
In Table 1, added the “Pin (44 QFN)” column.
In Table 1, added more description to the SCL, SDA, PRES, VCC, VPC,
SEC, TEST and VDD pins.
In Section 1.3.2, changed “FLSH_ERASE” to “ERASE” and
“FLSH_PGADR” to “PGADDR”. Added “The PGADDR register denotes
the page address for page erase. The page size is 512 (200h) bytes and
there are 128 pages within the flash memory. The PGADDR denotes the
upper seven bits of the flash memory address such that bit 7:1 of the
PGADDR corresponds to bit 15:9 of the flash memory address. Bit 0 of
the PGADDR is not used and is ignored.” In the description of the
PGADDR register, added “Note: the page address is shifted left by one bit
(see detailed description above).”
In Table 5, changed “FLSHCRL” to “FLSHCTL”.
In Table 5, removed the PREBOOT bit description.
In Table 5, moved the TRIMPCtl bit description to FUSECtl and moved the
FUSECtl bit description to TRIMPCtl.
In Table 6, changed “PGADR” to “PGADDR”.
In Table 7, added PGADDR.
In Table 8, changed the reset value for RTCCtl from “0x81” to “0x00”.
Added the RTCTrim0 and ACOMP registers. Deleted the OMP, VRCtl,
LEDCal and LOCKCtl registers.
In Table 7, removed the Mcount 7 row.
through USRIntCtl3 to USRIntCtl1 through USRIntCtl4.
In TCON, corrected the descriptions for TCON.2 and TCON.0.
In Section 1.7.9, added a note about USR pins defaulting as inputs after
reset.
Changed the register address for ATRMsB from FE21 to FE1F.
相關PDF資料 |
PDF描述 |
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| 73S1210F-44IM/F/P | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC44 |
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| 73S1210F-44IM/F | 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC44 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| 73S1210F-68IMR/F | 功能描述:8位微控制器 -MCU SoC Smart Card Readr w/PINpad & PWR Mgt RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| 73S1210F-68IMR/F/P | 功能描述:IC SMART CARD READER PROG 68-QFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:73S12xx 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:260 系列:73S12xx 核心處理器:80515 芯體尺寸:8-位 速度:24MHz 連通性:I²C，智能卡，UART/USART，USB 外圍設備:LED，POR，WDT 輸入/輸出數:9 程序存儲器容量:64KB（64K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:2K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數據轉換器:- 振蕩器型:內部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-VFQFN 裸露焊盤 包裝:管件 |
| 73S1210F-68M/F/PB | 制造商:Maxim Integrated Products 功能描述:- Trays |
| 73S1210F-68M/F/PG | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
| 73S1210F-68M/F/PH | 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT |
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