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參數資料
型號： 73S1210F-68IMR/F/P
廠商： MAXIM INTEGRATED PRODUCTS INC
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68
封裝： LEAD FREE, QFN-68
文件頁數： 52/126頁
文件大小： 1231K
代理商： 73S1210F-68IMR/F/P
DS_1210F_001
73S1210F Data Sheet
Rev. 1.4
31
Miscellaneous Control Register 1 (MISCtl1): 0xFFF2
0x10
Table 16: The MISCtl1 Register
MSB
LSB
–
FRPEN
FLSH66
–
Bit
Symbol
Function
MISCtl1.7
–
MISCtl1.6
–
MISCtl1.5
FRPEN
Flash Read Pulse enable (low). If FRPEN = 1, the Flash Read signal is
passed through with no change. When FRPEN = 0 a one-shot circuit that
shortens the Flash Read signal is enabled to save power. The Flash Read
pulse will shorten to 40 or 66ns (approximate based on the setting of the
FLSH66 bit) in duration, regardless of the MPU clock rate. For MPU clock
frequencies greater than 10MHz, this bit should be set high.
MISCtl1.4
FLSH66
When high, creates a 66ns Flash read pulse, otherwise creates a 40ns
read pulse when FRPEN is set.
MISCtl1.3
–
MISCtl1.2
–
MISCtl1.1
–
MISCtl1.0
–
Master Clock Control Register (MCLKCtl): 0x8F
0x0A
Table 17: The MCLKCtl Register
MSB
LSB
HSOEN
KBEN
SCEN
–
MCT.2
MCT.1
MCT.0
Bit
Symbol
Function
MCLKCtl.7
HSOEN*
High-speed oscillator enable. When set = 1, disables the high-speed
crystal oscillator and VCO/PLL system. This bit is not changed when the
PWRDN bit is set but the oscillator/VCO/PLL is disabled.
MCLKCtl.6
KBEN
1 = Disable the keypad logic clock. This bit is not changed in PWRDN
mode but the function is disabled.
MCLKCtl.5
SCEN
1 = Disable the smart card logic clock. This bit is not changed in PWRDN
mode but the function is disabled. Interrupt logic for card insertion/removal
remains operable even with smart card clock disabled.
MCLKCtl.4
–
MCLKCtl.3
–
MCLKCtl.2
MCT.2
This value determines the ratio of the VCO frequency (MCLK) to the
high-speed crystal oscillator frequency such that:
MCLK = (MCount*2 + 4)*Fxtal. The default value is MCount = 2h such
that MCLK = (2*2 + 4)*12.00MHz = 96MHz.
MCLKCtl.1
MCT.1
MCLKCtl.0
MCT.0
*Note: The HSOEN bit should never be set under normal circumstances. Power down control should
only be initiated via use of the PWRDN bit in MISCtl0.
相關PDF資料
PDF描述
73S1210F-68IM/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68
73S1210F-44IM/F/P 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC44
73S1210F-68IMR/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68
73S1210F-44IM/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC44
73S8009C-20IMR/F 1-CHANNEL POWER SUPPLY SUPPORT CKT, QCC20
相關代理商/技術參數
參數描述
73S1210F-68M/F/PB 制造商:Maxim Integrated Products 功能描述:- Trays
73S1210F-68M/F/PG 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
73S1210F-68M/F/PH 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
73S1210F-68M/F/PJ 制造商:Maxim Integrated Products 功能描述:SCR+PPAD/SRL INTFC/PWR MGT-3.11CODE - Rail/Tube
73S1210F-68MR/F/PG 功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數據總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數據 RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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