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參數資料
| 型號： | 74192 |
| 廠商： | 意法半導體 |
| 元件分類： | 通用總線功能 |
| 英文描述： | SYNCHRONOUS UP/DOWN DECADE(,BINARY) COUNTER |
| 中文描述： | 同步向上/向下十年（，二進制）計數器 |
| 文件頁數： | 1/15頁 |
| 文件大小： | 312K |
| 代理商： | 74192 |
M54/M74HC192
M54/M74HC193
October 1992
HC193 - SYNCHRONOUS UP/DOWN BINARY COUNTER
.
HIGH SPEED
f
MAX
= 54 MHz (TYP.) AT V
CC
= 5 V
.
LOWPOWER DISSIPATION
I
CC
= 4
μ
A(MAX.) AT T
A
= 25
°
C
.
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
.
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
.
SYMMETRICAL OUTPUT IMPEDANCE
|I
OH
| = I
OL
= 4 mA (MIN.)
.
BALANCEDPROPAGATION DELAYS
t
PLH
= t
PHL
.
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO6 V
.
PIN AND FUNCTION COMPATIBLE WITH
54/74LS192-193
HC192 - SYNCHRONOUS UP/DOWN DECADE COUNTER
B1R
(Plastic Package)
ORDER CODES :
M54HCXXXF1R
M74HCXXXB1R
M74HCXXXM1R
M74HCXXXC1R
F1R
(CeramicPackage)
M1R
(MicroPackage)
C1R
(Chip Carrier)
PIN CONNECTIONS
(top view)
NC =
DESCRIPTION
TheM54/74HC192/193 areahighspeedCMOSSYN-
CHRONOUSUP/DOWNDECADECOUNTERSfab-
ricated insilicon gate C
2
MOStechnology. They have
thesamehighspeedperformance ofLSTTLcombined
withtrue CMOSlow power consumption. The counter
has two separate clock inputs, an UP COUNT input
and a DOWN COUNT input. All outputsof the flip-flop
aresimultaneously triggered on the low to high transi-
tionofeitherclockwhiletheotherinputisheldhigh.The
direction of counting is determined by which input is
clocked. This counter may be preset by entering the
desired data on the DATA A, DATA B, DATA C, and
DATAD input. When the LOADinput istaken low the
data is loaded independently ofeither clockinput. This
feature allows the counters to be used as divide-by-n
counters by modifying the countlength with thepreset
inputs.Inadditionthecountercanalsobecleared.This
is accomplished by inputting a high on the CLEAR
input.All 4 internal stages aresettolowindependently
ofeither COUNTinput.BothaBORROWandCARRY
outputareprovided toenable cascadingofbothupand
down counting functions. The BORROW output pro-
ducesa negativegoing pulse when thecounterunder-
flows and the CARRY outputs a pulse when the
counter overflows. The counter can be cascaded by
connecting the CARRYandBORROWoutputsofone
device tothe COUNTUPand COUNTDOWNinputs,
respectively,ofthenextdevice.Allinputsareequipped
with protection circuits against static discharge and
transient excess voltage.
1/15
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