- 您現在的位置：買賣IC網 > PDF目錄369288 > 74AC16842 (Texas Instruments, Inc.) 20-Bit D-Type Latches With 3-State Outputs(20位D鎖存器(三態輸出)) PDF資料下載
參數資料
| 型號： | 74AC16842 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 20-Bit D-Type Latches With 3-State Outputs(20位D鎖存器(三態輸出)) |
| 中文描述： | 20位D類鎖存器與三態輸出（20位?鎖存器（三態輸出）） |
| 文件頁數： | 1/2頁 |
| 文件大小： | 20K |
| 代理商： | 74AC16842 |
54AC16842, 54ACT16842
74AC16842, 74ACT16842
20-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS
SCAS406 – JUNE 1990
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1990, Texas Instruments Incorporated
1
PRODUCT PREVIEW information concerns products in
Characteristic data and other specifications are design
goals. Texas Instruments reserves the right to change or
discontinue these products without notice.
Members of Texas Instruments Widebus
Family
Packaged in Shrink Small-Outline 300-mil
Packages (SSOP) and 380-mil Fine-Pitch
Ceramic Flat Packages Using 25-mil
Center-to-Center Pin Spacings
Inputs are TTL- or CMOS-Voltage
Compatible
3-State Outputs Drive Bus Lines Directly
Flow-Through Architecture Optimizes PCB
Layout
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
EPIC
(Enhanced-Performance Implanted
CMOS) 1-
μ
m Process
500-mA Typical Latch-Up Immunity at
125
°
C
description
The ’AC16842 and ’ACT16842 are inverting 20-bit
D-type latches composed of two 10-bit sections
with separate control signals. For each 10-bit
section, when the enable input 1C (or 2C) is low,
the latches are in the storage mode. In contrast,
when 1C (or 2C) is high, the latches are
transparent. In this mode, the inverse of the data
present at the 1D (or 2D) inputs is transmitted to
the 1Q (or 2Q) outputs if 1OE (or 2OE) is low. If
1OE (or 2OE) is high, the corresponding outputs
are in the high-impedance state.
The 74AC16842 and 74ACT16842 are packaged in TI’s shrink small-outline package (SSOP) with 25-mil
center-to-center pin spacings. This package provides twice the I/O pin count and functionality of a standard
small-outline package in the same printed-circuit-board area.
The ’AC16842 has CMOS-compatible input thresholds. The ’ACT16842 has TTL-compatible input thresholds.
The 54AC16842 and 54ACT16842 are characterized over the full military temperature range of –55
°
C to 125
°
C.
The 74AC16842 and 74ACT16842 are characterized for operation from –40
°
C to 85
°
C.
EPIC and Widebus are trademarks of Texas Instruments
Incorporated.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OE
1Q1
1Q2
GND
1Q3
1Q4
V
CC
1Q5
1Q6
1Q7
GND
1Q8
1Q9
1Q10
2Q1
2Q2
2Q3
GND
2Q4
2Q5
2Q6
V
CC
2Q7
2Q8
GND
2Q9
2Q10
2OE
1C
1D1
1D2
GND
1D3
1D4
V
CC
1D5
1D6
1D7
GND
1D8
1D9
1D10
2D1
2D2
2D3
GND
2D4
2D5
2D6
V
CC
2D7
2D8
GND
2D9
2D10
2C
16842, 74ACT16842 . . . DL PACKAGE
16842, 54ACT16842 . . . WD PACKAGE
(T0P VIEW)
P
相關PDF資料 |
PDF描述 |
|---|---|
| 74ACT16842 | 20-Bit D-Type Latches With 3-State Outputs(20位D鎖存器(三態輸出)) |
| 74AC16843 | 18-Bit D-Type Latches With 3-State Outputs(18位D鎖存器(三態輸出)) |
| 74ACT16843 | 18-Bit D-Type Latches With 3-State Outputs(18位D鎖存器(三態輸出)) |
| 74AC16853 | Dual 8-Bit To 9-Bit Parity Bus Transceivers.(雙8位-9位奇偶總線收發器) |
| 74ACT16853 | Dual 8-Bit To 9-Bit Parity Bus Transceivers.(雙8位-9位奇偶總線收發器) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| 74AC16842DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 74AC16843DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 74AC16853DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 74AC16854DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| 74AC16861DL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
發布緊急采購，3分鐘左右您將得到回復。