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參數資料
型號: 74ACT74TTR
廠商: 意法半導體
英文描述: DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
中文描述: 雙D型觸發器與預置和清除
文件頁數: 1/11頁
文件大小: 382K
代理商: 74ACT74TTR
1/12
April 2001
I
HIGH SPEED:
f
MAX
= 250MHz (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
μ
A(MAX.) at T
A
=25°C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
50
TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
IMPROVED LATCH-UP IMMUNITY
I
I
I
I
I
I
I
I
DESCRIPTION
The 74ACT74 is an advanced high-speed CMOS
DUAL D-TYPE FLIP FLOP WITH PRESET AND
CLEAR fabricated with sub-micron silicon gate
and double-layer metal wiring C
2
MOS tecnology.
A signal on the D INPUT is transferred to the Q
and Q OUTPUTS during the positive going
transition of the clock pulse.
CLEAR and PRESET are independent of the
clock and accomplished by a low setting on the
appropriate input.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74ACT74
DUAL D-TYPE FLIP FLOP WITH PRESET AND CLEAR
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
DIP
SOP
TSSOP
74ACT74B
74ACT74M
74ACT74MTR
74ACT74TTR
TSSOP
DIP
SOP
相關PDF資料
PDF描述
74ACT74 Dual D-Type Flip Flop with Preset and Clear(帶復位和清除的雙D觸發器)
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74AC843 9-Bit Transparent Latch
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