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參數(shù)資料
| 型號(hào)： | 74F539SCX |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 通用總線功能 |
| 英文描述： | 2-To-4-Line Demultiplexer |
| 中文描述： | F/FAST SERIES, OTHER DECODER/DRIVER, CONFIGURABLE OUTPUT, PDSO20 |
| 封裝： | 0.300 INCH, MS-013, SOIC-20 |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大小： | 44K |
| 代理商： | 74F539SCX |
Philips Semiconductors
Product specification
74F539
Dual 1-of-4 decoder (3-State)
1
1990 Feb 23
853–1274 98905
DESCRIPTION
The 74F539 contains two independent decoders. Each accepts two
address (A0 - A1) input signals and decodes them to select one of
four mutually exclusive outputs. A Polarity control (P) input
determines whether the outputs are active Low (P=H) or active High
(P=L). An active-Low Enable (E) is available for data demultiplexing.
Data is routed to the selected output in non-inverted or inverted form
in the active-Low mode or inverted form in the active-High mode. A
High signal on the Output Enable (OEn) input forces the 3-State
outputs to the high impedance state.
TYPE
TYPICAL
PROPAGATION DELAY
TYPICAL SUPPLY
CURRENT
(TOTAL)
74F539
7.5ns
40mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V
±
10%, T
amb
= 0
°
C to +70
°
C
20-Pin Plastic DIP
N74F539N
20-Pin Plastic SOL
N74F539D
PIN CONFIGURATION
20
19
18
17
16
15
14
13
12
10
11
9
8
7
6
5
4
3
2
1
V
CC
Q3b
A1b
A0b
OEa
Pa
Q0a
Q1a
Q2b
Q1b
Q0b
A0a
A1a
Q3a
Q2a
GND
Eb
Ea
OEb
Pb
SF01013
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS
DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0a - A1a
Decoder A Address inputs
1.0/1.0
20
μ
A/0.6mA
A0b - A1b
Decoder B Address inputs
1.0/1.0
20
μ
A/0.6mA
Ea, Eb
Enable inputs (active Low)
1.0/1.0
20
μ
A/0.6mA
OEa, OEb
Output Enable inputs (active Low)
1.0/1.0
20
μ
A/0.6mA
Pa, Pb
Polarity control inputs
1.0/1.0
20
μ
A/0.6mA
Q0a–Q3a
Decoder A Data outputs
150/40
3.0mA/24mA
Q0b–Q3b
NOTE:
One (1.0) FAST Unit Load is defined as: 20
μ
A in the High state and 0.6mA in the Low state.
Decoder A Data outputs
150/40
3.0mA/24mA
LOGIC SYMBOL
6
7
17
V
= Pin 20
GND = Pin 10
12
11
9
8
3
2
1
19
Q0a
Q1a
Q2a
Q3a
Q0b Q1b
Q2b
Q3b
Pa
Ea
OEa
Pb
Eb
OEb
13
15
14
4
16
5
A0a
A1a
A0b
SF01014
18
A1b
LOGIC SYMBOL (IEEE/IEC)
17
18
16
14
19
DMUX
1
2
3
5
0,4
0
1
G0
3
SF01015
8
9
11
12
1,4
2,4
3,4
6
7
15
4
N4
EN
13
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| 74F541 | Octal inverter buffer 3- State |
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| 74F540PC | Octal Buffer/Line Driver with TRI-STATE Outputs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74F539SJ | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:2-To-4-Line Demultiplexer |
| 74F540 | 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:Octal Buffer/Line Driver with TRI-STATE Outputs |
| 74F540_00 | 制造商:FAIRCHILD 制造商全稱(chēng):Fairchild Semiconductor 功能描述:Octal Buffer/Line Driver with 3-STATE Outputs |
| 74F540_YDH3026B WAF | 制造商:Fairchild Semiconductor Corporation 功能描述: |
| 74F540DC | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:8-Bit Inverting Buffer/Driver |
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