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參數(shù)資料
| 型號(hào)： | 74LCX16373MEA |
| 廠(chǎng)商： | Fairchild Semiconductor |
| 文件頁(yè)數(shù)： | 1/10頁(yè) |
| 文件大小： | 0K |
| 描述： | IC LATCH TRANSP 16BIT 5V 48-SSOP |
| 產(chǎn)品變化通告： | Die Material/Mold Compound Change 10/Sept/2008 |
| 標(biāo)準(zhǔn)包裝： | 29 |
| 系列： | 74LCX |
| 邏輯類(lèi)型： | D 型透明鎖存器 |
| 電路： | 8:8 |
| 輸出類(lèi)型： | 三態(tài) |
| 電源電壓： | 2 V ~ 3.6 V |
| 獨(dú)立電路： | 2 |
| 延遲時(shí)間 - 傳輸： | 1.5ns |
| 輸出電流高，低： | 24mA，24mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 48-BSSOP（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 48-SSOP |
| 包裝： | 管件 |
2005 Fairchild Semiconductor Corporation
DS012002
www.fairchildsemi.com
February 1994
Revised May 2005
7
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74LCX16373
Low Voltage 16-Bit Transparent Latch
with 5V Tolerant Inputs and Outputs
General Description
The LCX16373 contains sixteen non-inverting latches with
3-STATE outputs and is intended for bus oriented applica-
tions. The device is byte controlled. The flip-flops appear
transparent to the data when the Latch Enable (LE) is
HIGH. When LE is LOW, the data that meets the setup time
is latched. Data appears on the bus when the Output
Enable (OE) is LOW. When OE is HIGH, the outputs are in
a high impedance state.
The LCX16373 is designed for low voltage (2.5V or 3.3V)
VCC applications with capability of interfacing to a 5V signal
environment.
The LCX16373 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s 5V tolerant inputs and outputs
s 2.3V–3.6V VCC specifications provided
s 5.4 ns tPD max (VCC 3.3V), 20 PA ICC max
s Power down high impedance inputs and outputs
s Supports live insertion/withdrawal (Note 1)
s
r24 mA output drive (VCC 3.0V)
s Latch-up performance exceeds 500 mA
s ESD performance:
Human body model
! 2000V
Machine model
! 200V
s Also packaged in plastic Fine-Pitch Ball Grid Array
(FBGA)
Note 1: To ensure the high-impedance state during power up or down, OE
should be tied to VCC through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Note 2: Ordering code “G” indicates Trays.
Note 3: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Order Number
Package Number
Package Description
74LCX16373G
(Note 2)(Note 3)
BGA54A
54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide
74LCX16373MEA
(Note 3)
MS48A
48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide
74LCX16373MTD
(Note 3)
MTD48
48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide
s Uses proprietary noise/EMI reduction circuitry
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 74LCX16373MEA | 制造商:Fairchild Semiconductor Corporation 功能描述:LATCH LOGIC IC |
| 74LCX16373MEA_Q | 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線(xiàn)路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LCX16373MEAX | 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線(xiàn)路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LCX16373MTD | 功能描述:閉鎖 16-Bit Trans Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類(lèi)型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線(xiàn)路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時(shí)間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| 74LCX16373MTD | 制造商:Fairchild Semiconductor Corporation 功能描述:Latch Logic IC |
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